STM32F103ZC STMicroelectronics, STM32F103ZC Datasheet - Page 89

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STM32F103ZC

Manufacturer Part Number
STM32F103ZC
Description
Mainstream Performance line, ARM Cortex-M3 MCU with 256 Kbytes Flash, 72 MHz CPU, motor control, USB and CAN
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32F103ZC

Core
ARM 32-bit Cortex™-M3 CPU
Conversion Range
0 to 3.6 V
Dma
12-channel DMA controller
Supported Peripherals
timers, ADCs, DAC, SDIO, I2Ss, SPIs, I2Cs and USARTs
Systick Timer
a 24-bit downcounter

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STM32F103xC, STM32F103xD, STM32F103xE
Output voltage levels
Unless otherwise specified, the parameters given in
performed under ambient temperature and V
Table
Table 47.
1. The I
2. TTL and CMOS outputs are compatible with JEDEC standards JESD36 and JESD52.
3. The I
4. Based on characterization data, not tested in production.
V
V
Symbol
V
V
V
V
V
V
OH
OH
OL
OL
OH
OL
OH
and the sum of I
Table 8
OL
(1)(4)
(1)(4)
(3)(4)
(3)(4)
(1)
(3)
(1)
(3)
10. All I/Os are CMOS and TTL compliant.
IO
IO
current sunk by the device must always respect the absolute maximum rating specified in
current sourced by the device must always respect the absolute maximum rating specified in
and the sum of I
Output low level voltage for an I/O pin
when 8 pins are sunk at same time
Output high level voltage for an I/O pin
when 8 pins are sourced at same time
Output low level voltage for an I/O pin
when 8 pins are sunk at same time
Output high level voltage for an I/O pin
when 8 pins are sourced at same time
Output low level voltage for an I/O pin
when 8 pins are sunk at same time
Output high level voltage for an I/O pin
when 8 pins are sourced at same time
Output low level voltage for an I/O pin
when 8 pins are sunk at same time
Output high level voltage for an I/O pin
when 8 pins are sourced at same time
Output voltage characteristics
IO
(I/O ports and control pins) must not exceed I
IO
Parameter
(I/O ports and control pins) must not exceed I
Doc ID 14611 Rev 8
DD
supply voltage conditions summarized in
2.7 V < V
2.7 V < V
2.7 V < V
2 V < V
CMOS port
I
Conditions
I
IO
I
I
TTL port
Table 47
IO
IO
IO
= +20 mA
= +8 mA
= +6 mA
VSS
=+ 8mA
DD
DD
DD
DD
.
< 2.7 V
< 3.6 V
< 3.6 V
< 3.6 V
(2)
(2)
VDD
are derived from tests
.
Electrical characteristics
V
V
V
DD
DD
DD
Min
2.4
–0.4
–1.3
–0.4
Max
0.4
0.4
1.3
0.4
Table 8
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Unit
V
V
V
V

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