STM32F101RG STMicroelectronics, STM32F101RG Datasheet - Page 107

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STM32F101RG

Manufacturer Part Number
STM32F101RG
Description
Mainstream Access line, ARM Cortex-M3 MCU with 1 Mbyte Flash, 36 MHz CPU
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32F101RG

Conversion Range
0 to 3.6 V
Peripherals Supported
timers, ADC, DAC, SPIs, I2Cs and USARTs
Systick Timer
a 24-bit downcounter

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STM32F101xF, STM32F101xG
8
Revision history
Table 66.
15-Nov-2010
27-Oct-2009
Date
Document revision history
Revision
1
2
Initial release.
LQFP64 package mechanical data updated: see
10 x 10 mm, 64 pin low-profile quad flat package outline
LQFP64 – 10 x 10 mm, 64 pin low-profile quad flat package mechanical
data.
Internal code removed from
STM32F101xG ordering information
Updated note 2 below
Updated
Updated
Updated note 1 below
Updated
Updated
with data processing running from Flash
Updated
with data processing running from RAM
Updated
running from Flash or RAM
Updated
and Standby modes
Updated
data processing running from Flash
Updated
running from Flash or RAM
Updated
Updated
SRAM/PSRAM/NOR read waveforms on page 58
Added
Doc ID 17143 Rev 2
Section 5.3.13: I/O current injection characteristics on page 79
Table 16: Maximum current consumption in Sleep mode, code
Table 18: Typical current consumption in Run mode, code with
Figure 45: I2C bus AC waveforms and measurement circuit(1)
Figure 44: Recommended NRST pin protection
Table 20: Peripheral current consumption
Table 14: Maximum current consumption in Run mode, code
Table 15: Maximum current consumption in Run mode, code
Table 17: Typical and maximum current consumptions in Stop
Table 19: Typical current consumption in Sleep mode, code
Table 24: LSE oscillator characteristics (fLSE = 32.768 kHz)
Figure 21: Asynchronous non-multiplexed
Table 51: I2C characteristics
Table 46: I/O static characteristics
Table 65: STM32F101xF and
Changes
scheme.
Figure 58: LQFP64 –
Revision history
and
Table 63:
107/108

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