STM32F103VF STMicroelectronics, STM32F103VF Datasheet - Page 107

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STM32F103VF

Manufacturer Part Number
STM32F103VF
Description
Mainstream Performance line, ARM Cortex-M3 MCU with 768 Kbytes Flash, 72MHz CPU, motor control, USB and CAN
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32F103VF

Conversion Range
0 to 3.6 V
Supported Peripherals
timers, ADCs, DAC, SDIO, I2Ss, SPIs, I2Cs and USARTs
Systick Timer
a 24-bit downcounter

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STM32F103xF, STM32F103xG
Table 66.
1. Guaranteed by design, not tested in production.
2. Preliminary values.
Figure 59. 12-bit buffered /non-buffered DAC
1. The DAC integrates an output buffer that can be used to reduce the output impedance and to drive external loads directly
INL
Offset
Gain
error
t
Update
rate
t
PSRR+
SETTLING
WAKEUP
Symbol
without the use of an external operational amplifier. The buffer can be bypassed by configuring the BOFFx bit in the
DAC_CR register.
(2)
(2)
(2)
(2)
(1)
(2)
(2)
Integral non linearity
(difference between
measured value at Code i
and the value at Code i on a
line drawn between Code 0
and last Code 1023)
Offset error
(difference between
measured value at Code
(0x800) and the ideal value =
V
Gain error
Settling time (full scale: for a
10-bit input code transition
between the lowest and the
highest input codes when
DAC_OUT reaches final
value ±1LSB
Max frequency for a correct
DAC_OUT change when
small variation in the input
code (from code i to i+1LSB)
Wakeup time from off state
(Setting the ENx bit in the
DAC Control register)
Power supply rejection ratio
(to V
measurement
DAC characteristics (continued)
REF+
DDA
/2)
) (static DC
Parameter
Buffered/Non-buffered DAC
12-bit
digital to
analog
converter
Min
-
-
-
-
-
-
-
-
-
-
Doc ID 16554 Rev 3
–67
Buffer(1)
Typ
6.5
3
-
-
-
-
-
-
-
Max
±0.5
±10
±12
–40
DACx_OUT
±1
±4
±3
10
4
1
LSB
LSB
mV
LSB
LSB
%
µs
MS/s C
µs
dB
Unit
C
R
Given for the DAC in 10-bit
configuration
Given for the DAC in 12-bit
configuration
Given for the DAC in 12-bit
configuration
Given for the DAC in 10-bit at V
= 3.6 V
Given for the DAC in 12-bit at V
= 3.6 V
Given for the DAC in 12bit
configuration
C
C
input code between lowest and
highest possible ones.
No R
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
≤ 50 pF, R
≤ 50 pF, R
≤ 50 pF, R
Electrical characteristics
, C
LOAD
Comments
ai17157
LOAD
LOAD
LOAD
= 50 pF
≥ 5 kΩ
≥ 5 kΩ
≥ 5 kΩ
107/120
REF+
REF+

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