STM32F103VF STMicroelectronics, STM32F103VF Datasheet - Page 65

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STM32F103VF

Manufacturer Part Number
STM32F103VF
Description
Mainstream Performance line, ARM Cortex-M3 MCU with 768 Kbytes Flash, 72MHz CPU, motor control, USB and CAN
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32F103VF

Conversion Range
0 to 3.6 V
Supported Peripherals
timers, ADCs, DAC, SDIO, I2Ss, SPIs, I2Cs and USARTs
Systick Timer
a 24-bit downcounter

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STM32F103xF, STM32F103xG
Figure 24. Asynchronous multiplexed PSRAM/NOR read waveforms
Table 34.
1. C
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
w(NE)
v(NOE_NE)
w(NOE)
h(NE_NOE)
v(A_NE)
v(NADV_NE)
w(NADV)
h(AD_NADV)
h(A_NOE)
h(BL_NOE)
v(BL_NE)
su(Data_NE)
su(Data_NOE)
h(Data_NE)
h(Data_NOE)
Symbol
L
= 15 pF.
FSMC_NBL[1:0]
FSMC_ AD[15:0]
FSMC_A[25:16]
FSMC_NADV
FSMC_NWE
FSMC_NOE
Asynchronous multiplexed PSRAM/NOR read timings
FSMC_NE
FSMC_NE low time
FSMC_NEx low to FSMC_NOE low
FSMC_NOE low time
FSMC_NOE high to FSMC_NE high hold time
FSMC_NEx low to FSMC_A valid
FSMC_NEx low to FSMC_NADV low
FSMC_NADV low time
FSMC_AD (address) valid hold time after
FSMC_NADV high
Address hold time after FSMC_NOE high
FSMC_BL hold time after FSMC_NOE high
FSMC_NEx low to FSMC_BL valid
Data to FSMC_NEx high setup time
Data to FSMC_NOE high setup time
Data hold time after FSMC_NEx high
Data hold time after FSMC_NOE high
Parameter
Doc ID 16554 Rev 3
t
t
t
v(NADV_NE)
v(A_NE)
v(A_NE)
t
t
t
v(NOE_NE)
v(BL_NE)
w(NADV)
Address
Address
t
h(AD_NADV)
t
w(NE)
NBL
t
su(Data_NOE)
t
t
w(NOE)
su(Data_NE)
Data
7t
3t
4t
t
4t
HCLK
4t
HCLK
HCLK
t
HCLK
t
HCLK
HCLK
HCLK
h(NE_NOE)
t
t
HCLK
Min
h(BL_NOE)
0.5
0.5
t
h(A_NOE)
0
0
0
-
-
+ 0.5
Electrical characteristics
+ 0.5
+ 0.5
- 0.5
-2
– 1
- 1
(1)
3t
7t
4t
t
HCLK
HCLK
HCLK
HCLK
Max
t
h(Data_NOE)
0
1
0
-
-
-
-
-
-
-
-
t
h(Data_NE)
+ 1.5
+ 2
+ 2
+ 1
ai14892b
65/120
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit

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