STM32F100RB STMicroelectronics, STM32F100RB Datasheet - Page 59

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STM32F100RB

Manufacturer Part Number
STM32F100RB
Description
Mainstream Value line, ARM Cortex-M3 MCU with 128 Kbytes Flash, 24 MHz CPU, motor control and CEC functions
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32F100RB

Peripherals Supported
timers, ADC, SPIs, I2Cs, USARTs and DACs
Conversion Range
0 to 3.6 V
16-bit, 6-channel Advanced-control Timer
up to 6 channels for PWM output, dead time generation and emergency stop
Systick Timer
24-bit downcounter

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STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB
Output voltage levels
Unless otherwise specified, the parameters given in
performed under the ambient temperature and V
in
Table 35.
1. The I
2. TTL and CMOS outputs are compatible with JEDEC standards JESD36 and JESD52.
3. The I
4. Based on characterization data, not tested in production.
Symbol
V
V
V
V
V
V
V
V
Table
OH
OH
OH
OH
OL
OL
OL
OL
and the sum of I
Table 6
(1)
(1)
(1)
(1)
(3)
(3)
(3)
(3)
IO
IO
8. All I/Os are CMOS and TTL compliant.
current sunk by the device must always respect the absolute maximum rating specified in
current sourced by the device must always respect the absolute maximum rating specified in
and the sum of I
Output Low level voltage for an I/O pin
when 8 pins are sunk at the same time
Output High level voltage for an I/O pin
when 8 pins are sourced at the same time
Output low level voltage for an I/O pin
when 8 pins are sunk at the same time
Output high level voltage for an I/O pin
when 8 pins are sourced at the same time
Output low level voltage for an I/O pin
when 8 pins are sunk at the same time
Output high level voltage for an I/O pin
when 8 pins are sourced at the same time
Output low level voltage for an I/O pin
when 8 pins are sunk at the same time
Output high level voltage for an I/O pin
when 8 pins are sourced at the same time
Output voltage characteristics
IO
(I/O ports and control pins) must not exceed I
IO
Parameter
(I/O ports and control pins) must not exceed I
Doc ID 16455 Rev 6
DD
2.7 V < V
2.7 V < V
2.7 V < V
2 V < V
I
IO
I
supply voltage conditions summarized
CMOS port
Table 35
IO
I
Conditions
I
IO
TTL port
IO
= +20 mA
= +6 mA
VSS
= +8 mA,
= +8 mA
DD
DD
DD
DD
.
< 2.7 V
< 3.6 V
< 3.6 V
< 3.6 V
(2)
VDD
are derived from tests
(2)
(4)
(4)
.
Electrical characteristics
V
V
V
DD
DD
DD
Min
2.4
–0.4
–1.3
–0.4
Max
0.4
0.4
1.3
0.4
Table 6
Unit
59/87
V
V
V
V

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