STM32F102C8 STMicroelectronics, STM32F102C8 Datasheet - Page 14

• Manufacturer Part Number: STM32F102C8
• Description: Mainstream USB Access line, ARM Cortex-M3 MCU with 64 Kbytes Flash, 48 MHz CPU, USB FS
• Manufacturer: STMicroelectronics

Specifications of STM32F102C8

• Core: ARM 32-bit Cortex™-M3 CPU
• Peripherals Supported: timers, ADC, SPIs, I2Cs and USARTs
• Conversion Range: 0 to 3.6 V
• Systick Timer: 24-bit downcounter

Description
14/69
Boot modes
At startup, boot pins are used to select one of five boot options:
●
●
●
The boot loader is located in System Memory. It is used to reprogram the Flash memory by
using USART1. For further details please refer to AN2606.
Power supply schemes
●
●
●
For more details on how to connect power pins, refer to
Power supply supervisor
The device has an integrated power on reset (POR)/power down reset (PDR) circuitry. It is
always active, and ensures proper operation starting from/down to 2 V. The device remains
in reset mode when V
external reset circuit.
The device features an embedded programmable voltage detector (PVD) that monitors the
V
generated when V
than the V
message and/or put the MCU into a safe state. The PVD is enabled by software.
Refer to
V
Voltage regulator
The regulator has three operation modes: main (MR), low power (LPR) and power down.
●
●
●
This regulator is always enabled after reset. It is disabled in Standby mode, providing high
impedance output.
DD
POR/PDR
/V
Boot from User Flash
Boot from System Memory
Boot from embedded SRAM
V
Provided externally through V
V
and PLL (minimum voltage to be applied to V
V
V
registers (through power switch) when V
MR is used in the nominal regulation mode (Run)
LPR is used in the Stop mode
Power down is used in Standby mode: the regulator output is in high impedance: the
kernel circuitry is powered down, inducing zero consumption (but the contents of the
registers and SRAM are lost)
DD
SSA
DDA
BAT
DDA
Table 10: Embedded reset and power control block characteristics
= 2.0 to 3.6 V: External power supply for I/Os and the internal regulator.
, V
= 1.8 to 3.6 V: Power supply for RTC, external clock 32 kHz oscillator and backup
PVD
and V
power supply and compares it to the V
and V
DDA
threshold. The interrupt service routine can then generate a warning
PVD
SSA
= 2.0 to 3.6 V: External analog power supplies for ADC, Reset blocks, RCs
DD
.
must be connected to V
/V
DD
DDA
is below a specified threshold, V
drops below the V
Doc ID 15056 Rev 3
DD
pins.
DD
DD
PVD
and V
is not present.
PVD
threshold and/or when V
DDA
SS
threshold. An interrupt can be
is 2.4 V when the ADC is used).
Figure 8: Power supply
, respectively.
POR/PDR
STM32F102x8, STM32F102xB
, without the need for an
DD
for the values of
/V
DDA
scheme.
is higher