STM32F102RB STMicroelectronics, STM32F102RB Datasheet - Page 68

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STM32F102RB

Manufacturer Part Number
STM32F102RB
Description
Mainstream USB Access line, ARM Cortex-M3 MCU with 128 Kbytes Flash, 48 MHz CPU, USB FS
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32F102RB

Core
ARM 32-bit Cortex™-M3 CPU
Peripherals Supported
timers, ADC, SPIs, I2Cs and USARTs
Conversion Range
0 to 3.6 V
Systick Timer
24-bit downcounter

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Revision history
8
68/69
Revision history
Table 53.
23-Sep-2008
22-Sep-2009
23-Apr-2009
Date
Document revision history
Revision
1
2
3
Initial release.
I/O information clarified
density USB access line block diagram
modified.
In
PB14, PB15, PB3/TRACESWO moved from Default column to Remap
column.
P
conditions.
Note modified in
code with data processing running from Flash
current consumption in Sleep mode, code running from Flash or
Figure
Figure 27: ADC accuracy characteristics
Figure 29: Power supply and reference decoupling
Table 19: High-speed external user clock characteristics
Low-speed external user clock characteristics
ACC
Small text changes.
Note 5
V
voltage. Typical I
current consumptions in Stop and Standby
current consumption on VBAT with RTC on versus temperature at
different VBAT values
f
characteristics.
C
characteristics
32.768
oscillator characteristics
Low-power mode wakeup
Note 1
crystal.
Figure 21: Recommended NRST pin protection
IEC 1000 standard updated to IEC 61000 and SAE J1752/3 updated to
IEC 61967-2 in
Jitter added to
Table 40: SPI characteristics
C
R
Small text changes.
HSE_ext
D
RERINT
L1
ADC
AIN
Table 4: Medium-density STM32F102xx pin
value added for LQFP64 package in
and C
HSI
max values modified in
and R
Doc ID 15056 Rev 3
13,
updated in
modified below
kHz), notes modified and moved below the tables.
max values modified in
min modified in
and T
L2
Figure 14
AIN
replaced by C in
Coeff
Table 26: PLL
and
Section 5.3.10: EMC characteristics on page
parameters modified in
DD_VBAT
Table 12: Maximum current consumption in Run mode,
Table 4: Medium-density STM32F102xx pin
Table 22: LSE oscillator characteristics (fLSE =
added to
and
added.
Figure 18: Typical application with an 8 MHz
on page
Table 19: High-speed external user clock
modified. Conditions removed from
value added in
Figure 15
timings.
Table 45: RAIN max for fADC = 12
Table 11: Embedded internal reference
modified.
characteristics.
Table 21: HSE 4-16 MHz oscillator
Changes
Table 23: HSI oscillator
1.
Figure 1: STM32F102xx medium-
show typical curves.
STM32F102x8, STM32F102xB
Table 44: ADC
and
Table 8: General operating
Table 15: Typical and maximum
modified.
modes.
Figure 5: Memory map
modified.
definitions: PB4, PB13,
and
modified.
modified.
Table 14: Maximum
Figure 12: Typical
characteristics.
characteristics.
and
Table 23: HSI
Table 25:
Table 20:
44.
definitions.
MHz.
RAM.

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