STM32F417IE STMicroelectronics, STM32F417IE Datasheet - Page 23

• Manufacturer Part Number: STM32F417IE
• Description: High-performance and DSP with FPU, ARM Cortex-M4 MCU with 512 Kbytes Flash, 168 MHz CPU, Art Accelerator, Ethernet, HW crypto
• Manufacturer: STMicroelectronics

Specifications of STM32F417IE

• Core: ARM 32-bit Cortex™-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator™) allowing 0-wait state execution from Flash memory, frequency up to 168 MHz, memory protection unit, 210 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions
• 3×12-bit, 2.4 Msps A/d Converters: up to 24 channels and 7.2 MSPS in triple interleaved mode
• General-purpose Dma: 16-stream DMA controller with FIFOs and burst support
• Up To 17 Timers: up to twelve 16-bit and two 32-bit timers up to 168 MHz, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
• 10/100 Ethernet Mac With Dedicated Dma: supports IEEE 1588v2 hardware, MII/RMII
• Cryptographic Acceleration: hardware acceleration for AES 128, 192, 256, Triple DES, HASH (MD5, SHA-1), and HMAC
• Rtc: subsecond accuracy, hardware calendar

STM32F415xx, STM32F417xx
2.2.15
2.2.16
Power supply supervisor
The power supply supervisor is enabled by holding PDR_ON high.
The device has an integrated power-on reset (POR) / power-down reset (PDR) circuitry
coupled with a Brownout reset (BOR) circuitry. At power-on, BOR is always active, and
ensures proper operation starting from 1.8 V. After the 1.8 V BOR threshold level is reached,
the option byte loading process starts, either to confirm or modify default thresholds, or to
disable BOR permanently. Three BOR thresholds are available through option bytes.
The device remains in reset mode when V
V
The device also features an embedded programmable voltage detector (PVD) that monitors
the V
generated when V
than the V
message and/or put the MCU into a safe state. The PVD is enabled by software.
All packages, except for the LQFP64 and LQFP100, have an internal reset controlled
through the PDR_ON signal.
Voltage regulator
The regulator has eight operating modes:
●
●
●
●
Regulator ON
●
BOR
Regulator ON/internal reset ON
–
–
–
Regulator ON/internal reset OFF
–
–
–
Regulator OFF/internal reset ON
Regulator OFF/internal reset OFF
Regulator ON/internal reset ON
The regulator ON/internal reset ON mode is always enabled on LQFP64 and LQFP100
package.
On LQFP144 package, this mode is activated by setting PDR_ON to V
On UFBGA176 package, the internal regulator must be activated by connecting
BYPASS_REG to V
On LQFP176 packages, the internal reset must be activated by connecting PDR_ON to
V
DD
, without the need for an external reset circuit.
DD
/V
.
Main regulator mode (MR)
Low power regulator (LPR)
Power-down
Main regulator mode (MR)
Low power regulator (LPR)
Power-down
DDA
PVD
power supply and compares it to the V
threshold. The interrupt service routine can then generate a warning
DD
/V
DDA
SS,
drops below the V
and PDR_ON to V
Doc ID 022063 Rev 2
DD
PVD
is below a specified threshold, V
DD
.
threshold and/or when V
PVD
threshold. An interrupt can be
DD
DD
/V
.
POR/PDR
DDA
Description
is higher
23/168
or