STM32F417IE STMicroelectronics, STM32F417IE Datasheet - Page 96

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STM32F417IE

Manufacturer Part Number
STM32F417IE
Description
High-performance and DSP with FPU, ARM Cortex-M4 MCU with 512 Kbytes Flash, 168 MHz CPU, Art Accelerator, Ethernet, HW crypto
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32F417IE

Core
ARM 32-bit Cortex™-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator™) allowing 0-wait state execution from Flash memory, frequency up to 168 MHz, memory protection unit, 210 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions
3×12-bit, 2.4 Msps A/d Converters
up to 24 channels and 7.2 MSPS in triple interleaved mode
General-purpose Dma
16-stream DMA controller with FIFOs and burst support
Up To 17 Timers
up to twelve 16-bit and two 32-bit timers up to 168 MHz, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
10/100 Ethernet Mac With Dedicated Dma
supports IEEE 1588v2 hardware, MII/RMII
Cryptographic Acceleration
hardware acceleration for AES 128, 192, 256, Triple DES, HASH (MD5, SHA-1), and HMAC
Rtc
subsecond accuracy, hardware calendar

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Electrical characteristics
5.3.13
96/168
Table 37.
1. TBD stands for “to be defined”.
2. Guaranteed by design, not tested in production.
3. The maximum programming time is measured after 100K erase operations.
4. V
Table 38.
1. Based on characterization, not tested in production.
2. Cycling performed over the whole temperature range.
EMC characteristics
Susceptibility tests are performed on a sample basis during device characterization.
Functional EMS (electromagnetic susceptibility)
While a simple application is executed on the device (toggling 2 LEDs through I/O ports). the
device is stressed by two electromagnetic events until a failure occurs. The failure is
indicated by the LEDs:
Symbol
t
t
t
ERASE128KB
ERASE16KB
ERASE64KB
N
t
Symbol
RET
t
END
VPP
V
PP
t
V
Electrostatic discharge (ESD) (positive and negative) is applied to all device pins until
a functional disturbance occurs. This test is compliant with the IEC 61000-4-2 standard.
FTB: A burst of fast transient voltage (positive and negative) is applied to V
through a 100 pF capacitor, until a functional disturbance occurs. This test is compliant
with the IEC 61000-4-4 standard.
t
I
prog
ME
prog
PP
PP
should only be connected during programming/erasing.
(4)
Endurance
Data retention
Parameter
Flash memory programming with V
Flash memory endurance and data retention
Double word programming
Sector (16 KB) erase time
Sector (64 KB) erase time
Sector (128 KB) erase time
Mass erase time
Programming voltage
V
Minimum current sunk on
the V
Cumulative time during
which V
PP
voltage range
PP
PP
Parameter
pin
is applied
T
T
1 kcycle
1 kcycle
10 kcycles
A
A
= –40 to +105 °C (7 suffix versions)
= –40 to +85 °C (6 suffix versions)
Doc ID 022063 Rev 2
(2)
(2)
(2)
at T
at T
at T
Conditions
A
A
= 85 °C
= 105 °C
A
T
= 55 °C
A
Conditions
= 0 to +40 °C
PP
(1)
STM32F415xx, STM32F417xx
Min
2.7
10
7
-
-
-
-
-
-
(1)
Value
Min
30
10
20
TBD
TBD
TBD
10
Typ
6.8
16
-
-
-
-
(1)
Max
100
DD
3.6
9
1
-
-
-
-
-
(3)
(2)
and V
kcycles
Years
Unit
Unit
hour
mA
µs
V
V
SS

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