STM32F407ZG STMicroelectronics, STM32F407ZG Datasheet - Page 56

• Manufacturer Part Number: STM32F407ZG
• Description: High-performance and DSP with FPU, ARM Cortex-M4 MCU with 1 Mbyte Flash, 168 MHz CPU, Art Accelerator, Ethernet
• Manufacturer: STMicroelectronics

Specifications of STM32F407ZG

• Core: ARM 32-bit Cortex™-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator™) allowing 0-wait state execution from Flash memory, frequency up to 168 MHz, memory protection unit, 210 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions
• 3×12-bit, 2.4 Msps A/d Converters: up to 24 channels and 7.2 MSPS in triple interleaved mode
• General-purpose Dma: 16-stream DMA controller with FIFOs and burst support
• Up To 17 Timers: up to twelve 16-bit and two 32-bit timers up to 168 MHz, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
• 10/100 Ethernet Mac With Dedicated Dma: supports IEEE 1588v2 hardware, MII/RMII
• Rtc: subsecond accuracy, hardware calendar

Table 7.
PA10
PA11
PA12
PA13
PA14
PA15
PB10
PB11
PB12
PB13
PB14
Port
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PB8
PB9
JTMS-SWDIO
JTCK-SWCLK
TRACESWO
MCO1
JTDO/
JTRST
SYS
AF0
JTDI
Alternate function mapping
TIM1_CH1N
TIM1_CH2N
TIM1_CH3N
TIM1_CH1N
TIM1_CH2N
TIM1_BKIN
TIM 2_CH1
TIM 2_ETR
TIM1_BKIN
TIM2_CH1
TIM2_ETR
TIM2_CH2
TIM2_CH3
TIM2_CH4
TIM2_CH1
TIM2_ETR
TIM1_CH1
TIM1_CH2
TIM1_CH3
TIM1_CH4
TIM1_ETR
TIM2_CH2
TIM2_CH3
TIM2_CH4
TIM1/2
AF1
TIM 5_CH1
TIM5_CH2
TIM5_CH3
TIM5_CH4
TIM3_CH1
TIM3_CH2
TIM3_CH3
TIM3_CH4
TIM3_CH1
TIM3_CH2
TIM4_CH1
TIM4_CH2
TIM4_CH3
TIM4_CH4
TIM3/4/5
AF2
TIM8/9/10/11
TIM8_CH1N
TIM8_CH1N
TIM8_CH2N
TIM8_CH3N
TIM10_CH1
TIM11_CH1
TIM8_CH2N
TIM8_BKIN
TIM8_ETR
TIM9_CH1
TIM9_CH2
AF3
I2C3_SMBA
I2C1_SMBA
I2C2_SMBA
I2C3_SCL
I2C1_SCL
I2C1_SDA
I2C1_SCL
I2C1_SDA
I2C2_SCL
I2C2_SDA
I2C1/2/3
AF4
I2S2/I2S2ext
SPI1/SPI2/
SPI1_MISO
SPI1_MOSI
SPI1_MISO
SPI1_MOSI
SPI2_MISO
SPI1_NSS
SPI1_SCK
SPI1_NSS
SPI1_SCK
SPI2_NSS
SPI2_SCK
SPI2_NSS
SPI2_SCK
I2S2_WS
I2S2_WS
I2S2_CK
I2S2_WS
I2S2_CK
AF5
SPI3/I2Sext/
SPI3_MISO
SPI3_MOSI
I2S2ext_SD
SPI3_NSS
SPI3_NSS/
I2S3S_WS
SPI3_SCK
I2S3_WS
I2S3_CK
I2S3_SD
AF6
I2S3
USART1/2/3/
USART2_CTS
USART2_RTS
USART1_CTS
USART1_RTS
USART3_CTS
USART3_RTS
USART2_TX
USART2_RX
USART2_CK
USART1_CK
USART1_TX
USART1_RX
USART1_TX
USART1_RX
USART3_TX
USART3_RX
USART3_CK
I2S3ext_SD
I2S3ext
AF7
UART4_TX
UART4_RX
UART4/5/
USART6
AF8
CAN1/CAN2/
TIM12/13/14
TIM13_CH1
TIM14_CH1
TIM12_CH1
CAN1_RX
CAN1_TX
CAN2_RX
CAN2_TX
CAN1_RX
CAN1_TX
CAN2_RX
CAN2_TX
AF9
OTG_FS/ OTG_HS
OTG_HS_ULPI_CK
OTG_HS_ULPI_D0
OTG_HS_ULPI_D1
OTG_HS_ULPI_D2
OTG_HS_ULPI_D7
OTG_HS_ULPI_D3
OTG_HS_ULPI_D4
OTG_HS_ULPI_D5
OTG_HS_ULPI_D6
OTG_FS_SOF
OTG_FS_DM
OTG_FS_DP
OTG_FS_ID
AF10
ETH_RMII _REF_CLK
ETH_RMII _CRS_DV
ETH _RMII_TX_EN
ETH_MII _RX_CLK
ETH_MII _RX_DV
ETH_ MII_RX_ER
ETH _RMII_TXD0
ETH _RMII_TXD1
ETH _MII_TX_EN
ETH _MII_RXD2
ETH _MII_RXD3
ETH _PPS_OUT
ETH _MII_TXD3
ETH _MII_TXD0
ETH _MII_TXD1
ETH _MII_COL
ETH_MII_CRS
ETH_MDIO
AF11
ETH
OTG_HS_INTN
OTG_HS_SOF
FSMC/SDIO/
OTG_HS_DM
OTG_HS_ID
FSMC_NL
OTG_FS
SDIO_D5
SDIO_D4
AF12
DCMI_HSYNC
DCMI_VSYNC
DCMI_PIXCK
DCMI_D10
DCMI_D1
DCMI_D5
DCMI_D7
DCMI_D0
DCMI_D6
DCMI
AF13
AF014
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
AF15