STM32F407ZG STMicroelectronics, STM32F407ZG Datasheet - Page 98

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STM32F407ZG

Manufacturer Part Number
STM32F407ZG
Description
High-performance and DSP with FPU, ARM Cortex-M4 MCU with 1 Mbyte Flash, 168 MHz CPU, Art Accelerator, Ethernet
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32F407ZG

Core
ARM 32-bit Cortex™-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator™) allowing 0-wait state execution from Flash memory, frequency up to 168 MHz, memory protection unit, 210 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions
3×12-bit, 2.4 Msps A/d Converters
up to 24 channels and 7.2 MSPS in triple interleaved mode
General-purpose Dma
16-stream DMA controller with FIFOs and burst support
Up To 17 Timers
up to twelve 16-bit and two 32-bit timers up to 168 MHz, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
10/100 Ethernet Mac With Dedicated Dma
supports IEEE 1588v2 hardware, MII/RMII
Rtc
subsecond accuracy, hardware calendar

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Electrical characteristics
Table 42.
5.3.15
98/167
Symbol
LU
Static latchup
Two complementary static tests are required on six parts to assess the latchup
performance:
These tests are compliant with EIA/JESD 78A IC latchup standard.
Electrical sensitivities
I/O current injection characteristics
As a general rule, current injection to the I/O pins, due to external voltage below V
above V
operation. However, in order to give an indication of the robustness of the microcontroller in
cases when abnormal injection accidentally happens, susceptibility tests are performed on a
sample basis during device characterization.
Functional susceptibilty to I/O current injection
While a simple application is executed on the device, the device is stressed by injecting
current into the I/O pins programmed in floating input mode. While current is injected into the
I/O pin, one at a time, the device is checked for functional failures.
The failure is indicated by an out of range parameter: ADC error above a certain limit (>5
LSB TUE), out of spec current injection on adjacent pins or other functional failure (for
example reset, oscillator frequency deviation).
The test results are given in
Table 43. I/O current injection susceptibility
Static latch-up class
Symbol
I
A supply overvoltage is applied to each power supply pin
A current injection is applied to each input, output and configurable I/O pin
INJ
Parameter
DD
(for standard, 3 V-capable I/O pins) should be avoided during normal product
Injected current on all FT pins
Injected current on any other pin
T
Description
A
Table
= +105 °C conforming to JESD78A
Doc ID 022152 Rev 2
43.
Conditions
Functional susceptibility
Negative
injection
–5
–5
STM32F405xx, STM32F407xx
injection
Positive
+0
+5
II level A
Class
SS
Unit
mA
or

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