STM32F407VG STMicroelectronics, STM32F407VG Datasheet - Page 53

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STM32F407VG

Manufacturer Part Number
STM32F407VG
Description
High-performance and DSP with FPU, ARM Cortex-M4 MCU with 1 Mbyte Flash, 168 MHz CPU, Art Accelerator, Ethernet
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32F407VG

Core
ARM 32-bit Cortex™-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator™) allowing 0-wait state execution from Flash memory, frequency up to 168 MHz, memory protection unit, 210 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions
3×12-bit, 2.4 Msps A/d Converters
up to 24 channels and 7.2 MSPS in triple interleaved mode
General-purpose Dma
16-stream DMA controller with FIFOs and burst support
Up To 17 Timers
up to twelve 16-bit and two 32-bit timers up to 168 MHz, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
10/100 Ethernet Mac With Dedicated Dma
supports IEEE 1588v2 hardware, MII/RMII
Rtc
subsecond accuracy, hardware calendar

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STM32F405xx, STM32F407xx
Table 6.
55 89 133 A10 161
56 90 134 A9 162
57 91 135 A6 163
58 92 136 B6 164
-
-
-
-
-
-
-
-
Pin number
- 125 B10 153
- 126 B9 154
- 127 B8 155
- 128 A8 156
- 129 A7 157
- 130 D7 158
- 131 C7 159
- 132 B7 160
STM32F40x pin and ball definitions (continued)
(function after
TRACESWO)
(NJTRST)
Pin name
reset)
(JTDO/
PG10
PG11
PG12
PG13
PG14
PG15
V
PB3
PB4
PB5
PB6
V
SS
DD
(1)
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
S
S
Doc ID 022152 Rev 2
FSMC_A25 / USART6_TX
ETH_PPS_OUT/TIM3_CH
SPI3_MOSI / DCMI_D10 /
TIM3_CH1 / SPI1_MISO /
FSMC_NE3/ EVENTOUT
I2S3ext_SD/ EVENTOUT
I2C1_SMBA/ CAN2_RX /
DCMI_D13/ EVENTOUT
TIM2_CH2 / SPI1_SCK/
DCMI_D5/USART1_TX/
I2C1_SCL/ TIM4_CH1 /
SPI3_SCK / I2S3_CK /
NJTRST/ SPI3_MISO /
I2S3_SD/ EVENTOUT
OTG_HS_ULPI_D7 /
Alternate functions
JTDO/ TRACESWO/
ETH _RMII_TX_EN/
ETH_RMII_TXD0/
ETH_RMII_TXD1/
ETH_MII_TX_EN/
FSMC_NCE4_2 /
/ETH_MII_TXD0/
/ETH_MII_TXD1/
FSMC_NCE4_1/
USART6_CTS /
2 / SPI1_MOSI/
USART6_RTS/
USART6_CTS
FSMC_NE4 /
FSMC_A24 /
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
CAN2_TX /
Pinouts and pin description
Additional functions
53/167

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