STM8S207RB STMicroelectronics, STM8S207RB Datasheet - Page 39

• Manufacturer Part Number: STM8S207RB
• Description: Performance line, 24 MHz STM8S 8-bit MCU, up to 128 Kbytes Flash, integrated EEPROM
• Manufacturer: STMicroelectronics

Specifications of STM8S207RB

• Max Fcpu: up to 24 MHz, 0 wait states @ fCPU≤ 16 MHz
• Program: up to 128 Kbytes Flash; data retention 20 years at 55 °C after 10 kcycles
• Data: up to 2 Kbytes true data EEPROM; endurance 300 kcycles
• Ram: up to 6 Kbytes
• Advanced Control Timer: 16-bit, 4 CAPCOM channels, 3 complementary outputs, dead-time insertion and flexible synchronization

STM8S207xx, STM8S208xx
Table 9.
0x00 5270 to
0x00 525A
0x00 525B
0x00 525C
0x00 525D
0x00 525E
0x00 526A
0x00 526B
0x00 526C
0x00 526D
0x00 526E
0x00 52FF
0x00 5250
0x00 5251
0x00 5252
0x00 5253
0x00 5254
0x00 5255
0x00 5256
0x00 5257
0x00 5258
0x00 5259
0x00 525F
0x00 5260
0x00 5261
0x00 5262
0x00 5263
0x00 5264
0x00 5265
0x00 5266
0x00 5267
0x00 5268
0x00 5269
0x00 526F
Address
General hardware register map (continued)
Block
TIM1
Register label
TIM1_CCMR1
TIM1_CCMR2
TIM1_CCMR3
TIM1_CCMR4
TIM1_CNTRH
TIM1_PSCRH
TIM1_CCR1H
TIM1_CCR2H
TIM1_CCR3H
TIM1_CCR4H
TIM1_CCER1
TIM1_CCER2
TIM1_CNTRL
TIM1_PSCRL
TIM1_CCR1L
TIM1_CCR2L
TIM1_CCR3L
TIM1_CCR4L
TIM1_SMCR
TIM1_ARRH
TIM1_ARRL
TIM1_OISR
TIM1_EGR
TIM1_RCR
TIM1_CR1
TIM1_CR2
TIM1_BKR
TIM1_DTR
TIM1_ETR
TIM1_SR1
TIM1_SR2
TIM1_IER
Doc ID 14733 Rev 12
Reserved area (147 bytes)
TIM1 capture/compare enable register 1
TIM1 capture/compare enable register 2
TIM1 capture/compare mode register 1
TIM1 capture/compare mode register 2
TIM1 capture/compare mode register 3
TIM1 capture/compare mode register 4
TIM1 capture/compare register 1 high
TIM1 capture/compare register 2 high
TIM1 capture/compare register 3 high
TIM1 capture/compare register 4 high
TIM1 capture/compare register 1 low
TIM1 capture/compare register 2 low
TIM1 capture/compare register 3 low
TIM1 capture/compare register 4 low
TIM1 slave mode control register
TIM1 repetition counter register
TIM1 event generation register
TIM1 auto-reload register high
TIM1 output idle state register
TIM1 Interrupt enable register
TIM1 auto-reload register low
TIM1 external trigger register
TIM1 prescaler register high
TIM1 prescaler register low
TIM1 dead-time register
TIM1 control register 1
TIM1 control register 2
TIM1 status register 1
TIM1 status register 2
TIM1 break register
TIM1 counter high
TIM1 counter low
Register name
Memory and register map
status
Reset
0xFF
0xFF
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
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