STM8AF51A9 STMicroelectronics, STM8AF51A9 Datasheet - Page 26

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STM8AF51A9

Manufacturer Part Number
STM8AF51A9
Description
Automotive 8-bit MCU, with up to 128 Kbytes Flash, EEPROM, 10-bit ADC, timers, LIN, CAN, USART, SPI, I2C, 3 V to 5.5 V
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM8AF51A9

Max Fcpu
24 MHz
Program Memory
32 to 128 Kbytes Flash program; data retention 20 years at 55 °C
Data Memory
up to 2 Kbytes true data EEPROM; endurance 300 kcycles
Ram
2 Kbytes to 6 Kbytes
Advanced Control Timer
16-bit, 4 CAPCOM channels, 3 complementary outputs, dead-time insertion and flexible synchronization

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Product overview
5.9.5
5.10
26/106
Controller area network interface (beCAN)
The beCAN controller (basic enhanced CAN), interfaces the CAN network and supports the
CAN protocol version 2.0A and B. It is equipped with a receive FIFO and a very versatile
filter bank. Together with a filter match index, this allows a very efficient message handling in
today’s car network architectures. The CPU is significantly unloaded. The maximum
transmission speed is 1 Mbit/s.
Transmission
Reception
Interrupt management
Input/output specifications
The product features four I/O types:
To decrease EMI (electromagnetic interference), high sink I/Os have a limited maximum
slew rate. The rise and fall times are similar to those of standard I/Os.
Interrupt:
Wakeup from Halt on address detection in slave mode
Three transmit mailboxes
Configurable transmit priority by identifier or order request
11- and 29-bit ID
1 receive FIFO (3 messages deep)
Software-efficient mailbox mapping at a unique address space
FMI (filter match index) stored with message for quick message association
Configurable FIFO overrun
Time stamp on SOF reception
6 filter banks, 2 x 32 bytes (scalable to 4 x 16-bit) each, enabling various masking
configurations, such as 12 filters for 29-bit ID or 48 filters for 11-bit ID.
Filtering modes (mixable):
Maskable interrupt
Software-efficient mailbox mapping at a unique address space
Standard I/O 2 MHz
Fast I/O up to 10 MHz
High sink 8 mA, 2 MHz
True open drain (I
Successful address/data communication
Error condition
Wakeup from Halt
Mask mode permitting ID range filtering
ID list mode
2
C interface)
Doc ID 14395 Rev 8
STM8AF52/62xx, STM8AF51/61xx

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