ST7232AK2-Auto STMicroelectronics, ST7232AK2-Auto Datasheet - Page 133

• Manufacturer Part Number: ST7232AK2-Auto
• Description: 8-bit MCU for automotive, 16 Kbyte Flash, 10-bit ADC, 4 timers, SPI, SCI
• Manufacturer: STMicroelectronics

Specifications of ST7232AK2-Auto

• Hdflash Endurance: 100 cycles, data retention
• Clock Sources: crystal/ceramic resonator oscillators and bypass for external clock
• Four Power Saving Modes: halt, active halt, wait and slow
• Main Clock Controller With: real time base, beep and clock-out capabilities
• Two 16-bit Timers With: 2 input captures, 2 output compares, PWM and pulse generator modes

ST7232Axx-Auto
Control register 1 (SCICR1)
Table 48.
SCICR1
R/W
R8
Bit
7
7
6
5
4
3
2
SCICR1 register description
R/W
Bit name
T8
6
WAKE
SCID
PCE
R8
T8
M
SCID
R/W
Receive data bit 8
Transmit data bit 8
Disabled for low power consumption
Word length
Wake up method
Parity control enable
5
This bit is used to store the 9th bit of the received word when M = 1.
This bit is used to store the 9th bit of the transmitted word when
M = 1.
When this bit is set the SCI prescalers and outputs are stopped at
the end of the current byte transfer in order to reduce power
consumption.This bit is set and cleared by software.
0: SCI enabled
1: SCI prescaler and outputs disabled
This bit determines the word length. It is set or cleared by software.
0: 1 Start bit, 8 Data bits, 1 Stop bit
1: 1 Start bit, 9 Data bits, 1 Stop bit
Note: The M bit must not be modified during a data transfer (both
transmission and reception).
This bit determines the SCI wake up method, it is set or cleared by
software.
0: Idle line
1: Address mark
This bit selects the hardware parity control (generation and
detection). When the parity control is enabled, the computed parity is
inserted at the MSB position (9th bit if M = 1; 8th bit if M = 0) and
parity is checked on the received data. This bit is set and cleared by
software. Once it is set, PCE is active after the current byte (in
reception and in transmission).
0: Parity control disabled
1: Parity control enabled
R/W
M
4
WAKE
R/W
3
Function
PCE
R/W
2
Reset value: x000 0000 (x0b)
On-chip peripherals
R/W
PS
1
R/W
PIE
133/201
0