DS1220AB Maxim, DS1220AB Datasheet - Page 2

• Manufacturer Part Number: DS1220AB
• Description: The DS1220AB and DS1220AD 16k Nonvolatile (NV) SRAMs are 16,384-bit, fully static, NV SRAMs organized as 2048 words by 8 bits
• Manufacturer: Maxim

READ MODE
The DS1220AB and DS1220AD execute a read cycle whenever WE (Write Enable) is inactive (high) and
address inputs (A0-A10) defines which of the 2048 bytes of data is to be accessed. Valid data will be
available to the eight data output drivers within t
stable, providing that the CE and OE access times are also satisfied. If CE and OE access times are not
satisfied, then data access must be measured from the later-occurring signal and the limiting parameter is
either t
WRITE MODE
The DS1220AB and DS1220AD execute a write cycle whenever the WE and CE signals are active (low)
after address inputs are stable. The latter occurring falling edge of CE or WE will determine the start of
the write cycle. The write cycle is terminated by the earlier rising edge of CE or WE . All address inputs
must be kept valid throughout the write cycle. WE must return to the high state for a minimum recovery
time (t
during write cycles to avoid bus contention. However, if the output drivers are enabled ( CE and OE
active) then WE will disable the outputs in t
DATA RETENTION MODE
The DS1220AB provides full functional capability for V
4.5V. The DS1220AD provides full functional capability for V
by 4.25V. Data is maintained in the absence of V
nonvolatile static RAMs constantly monitor V
automatically write protect themselves, all inputs become “don’t care,” and all outputs become high
impedance. As V
energy source to RAM to retain data. During power-up, when V
the power switching circuit connects external V
Normal RAM operation can resume after V
DS1220AD.
FRESHNESS SEAL
Each DS1220 device is shipped from Dallas Semiconductor with its lithium energy source disconnected,
guaranteeing full energy capacity. When V
energy source is enabled for battery backup operation.
CE (Chip Enable) and OE (Output Enable) are active (low). The unique address specified by the 11
WR
CO
for CE or t
) before another cycle can be initiated. The OE control signal should be kept inactive (high)
CC
falls below approximately 3.0 volts, a power switching circuit connects the lithium
OE
for OE rather than address access.
ODW
CC
CC
exceeds 4.75 volts for the DS1220AB and 4.5 volts for the
is first applied at a level of greater than V
from its falling edge.
CC
CC
ACC
2 of 8
. Should the supply voltage decay, the NV SRAMs
to RAM and disconnects the lithium energy source.
(Access Time) after the last address input signal is
CC
CC
without any additional support circuitry. The
greater than 4.75 volts and write protects by
CC
greater than 4.5 volts and write protects
CC
rises above approximately 3.0 volts,
TP
DS1220AB/AD
, the lithium