DS1230W Maxim, DS1230W Datasheet - Page 2

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DS1230W

Manufacturer Part Number
DS1230W
Description
The DS1230W 3
Manufacturer
Maxim
Datasheet

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DESCRIPTION
The DS1230W 3.3V 256k Nonvolatile SRAM is a 262,144-bit, fully static, nonvolatile SRAM organized
as 32,768 words by 8 bits. Each NV SRAM has a self-contained lithium energy source and control
circuitry, which constantly monitors V
the lithium energy source is automatically switched on and write protection is unconditionally enabled to
prevent data corruption. DIP-package DS1230W devices can be used in place of existing 32k x 8 static
RAMs directly conforming to the popular bytewide 28-pin DIP standard. The DIP devices also match the
pinout of 28256 EEPROMs, allowing direct substitution while enhancing performance. DS1230W
devices in the PowerCap Module package are directly surface mountable and are normally paired with a
DS9034PC PowerCap to form a complete Nonvolatile SRAM Module. There is no limit on the number of
write cycles that can be executed and no additional support circuitry is required for microprocessor
interfacing.
READ MODE
The DS1230W executes a read cycle whenever
Enable) and
(A
eight data output drivers within t
that
satisfied, then data access must be measured from the later-occurring signal (
parameter is either t
WRITE MODE
The DS1230W executes a write cycle whenever the
inputs are stable. The later-occurring falling edge of
The write cycle is terminated by the earlier rising edge of
valid throughout the write cycle.
before another cycle can be initiated. The
cycles to avoid bus contention. However, if the output drivers are enabled (
will disable the outputs in t
DATA RETENTION MODE
The DS1230W provides full functional capability for V
volts. Data is maintained in the absence of V
static RAMs constantly monitor V
write protect themselves, all inputs become “don’t care,” and all outputs become high-impedance. As V
falls below approximately 2.5 volts, a power switching circuit connects the lithium energy source to
RAM to retain data. During power-up, when V
switching circuit connects external V
RAM operation can resume after V
FRESHNESS SEAL
Each DS1230W device is shipped from Maxim with its lithium energy source disconnected, guaranteeing
full energy capacity. When V
is enabled for battery back-up operation.
0
– A
CE
14
and
) defines which of the 32,768 bytes of data is to be accessed. Valid data will be available to the
OE
OE
(Output Enable) are active (low). The unique address specified by the 15 address inputs
(Output Enable) access times are also satisfied. If
CO
for
CE
ODW
CC
or t
from its falling edge.
is first applied at a level greater than 3.0 volts, the lithium energy source
ACC
OE
WE
CC
CC
for
(Access Time) after the last address input signal is stable, providing
. Should the supply voltage decay, the NV SRAMs automatically
exceeds 3.0 volts.
CC
CC
must return to the high state for a minimum recovery time (t
OE
for an out-of-tolerance condition. When such a condition occurs,
to RAM and disconnects the lithium energy source. Normal
OE
rather than address access.
CC
control signal should be kept inactive (high) during write
without any additional support circuitry. The nonvolatile
WE
2 of 10
CC
CE
WE
rises above approximately 2.5 volts, the power
(Write Enable) is inactive (high) and
CC
or
greater than 3.0 volts and write protects by 2.8
and
WE
CE
CE
will determine the start of the write cycle.
or
signals are active (low) after address
WE
OE
. All address inputs must be kept
and
CE
CE
and
CE
or
access times are not
OE
OE
) and the limiting
active) then
CE
DS1230W
(Chip
WE
WR
CC
)

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