DS1220AD Maxim, DS1220AD Datasheet - Page 6

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DS1220AD

Manufacturer Part Number
DS1220AD
Description
The DS1220AB and DS1220AD 16k Nonvolatile (NV) SRAMs are 16,384-bit, fully static, NV SRAMs organized as 2048 words by 8 bits
Manufacturer
Maxim
Datasheet

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POWER-DOWN/POWER-UP CONDITION
SEE NOTE 11
POWER-DOWN/POWER-UP TIMING
WARNING:
Under no circumstances are negative undershoots, of any amplitude, allowed when device is in the
battery backup mode.
NOTES:
1. WE is high for a read cycle.
2. OE = V
3. t
4. t
5. These parameters are sampled with a 5 pF load and are not 100% tested.
6. If the CE low transition occurs simultaneously with or later than the WE low transition, the output
7. If the CE high transition occurs prior to or simultaneously with the WE high transition, the output
PARAMETER
V
V
V
V
V
PARAMETER
Expected Data Retention Time
CC
CC
CC
CC
CC
going low to the earlier of CE or WE going high.
buffers remain in a high-impedance state during this period.
buffers remain in a high-impedance state during this period.
WP
DS
Fail Detect to
slew from V
slew from 0V to V
Valid to
Valid to End of Write Protection
is measured from the earlier of CE or WE going high.
is specified as the logical AND of CE and WE . t
IH
or V
CE
TP
IL
and
. If OE = V
CE
to 0V
WE
and
TP
Inactive
WE
IH
Inactive
during write cycle, the output buffers remain in a high-impedance state.
SYMBOL
t
t
t
REC
t
t
PD
PU
SYMBOL MIN TYP MAX UNITS
F
R
6 of 8
t
DR
MIN
300
300
WP
is measured from the latter of CE or CE
10
TYP
MAX
125
1.5
2
(T
A
UNITS
years
: See Note 10)
ms
ms
µs
µs
µs
(T
A
DS1220AB/AD
= +25°C)
NOTES
NOTES
9
11

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