DS1245Y Maxim, DS1245Y Datasheet - Page 8

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DS1245Y

Manufacturer Part Number
DS1245Y
Description
The DS1245 1024k Nonvolatile (NV) SRAMs are 1,048,576-bit, fully static, nonvolatile SRAMs organized as 131,072 words by 8 bits
Manufacturer
Maxim
Datasheet

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POWER-DOWN/POWER-UP TIMING
WARNING:
Under no circumstance are negative undershoots, of any amplitude, allowed when device is in battery
backup mode.
NOTES:
1.
2.
3. t
4. t
5. These parameters are sampled with a 5 pF load and are not 100% tested.
6. If the
7. If the
8. If
9. Each DS1245 has a built-in switch that disconnects the lithium source until the user first applies V
10. Each DS1245 has a built-in switch that disconnects the lithium source until V
11. All AC and DC electrical characteristics are valid over the full operating temperature range. For
12. In a power-down condition the voltage on any pin may not exceed the voltage on V
PARAMETER
V
V
V
V
V
PARAMETER
Expected Data Retention Time
CC
CC
CC
CC
CC
going low to the earlier of
buffers remain in a high impedance state during this period.
buffers remain in high impedance state during this period.
the output buffers remain in a high impedance state during this period.
The expected t
is first applied by the user. This parameter is assured by component selection, process control, and
design. It is not measured directly during production testing.
user. The expected t
power is first applied by the user.
commercial products, this range is 0°C to 70°C. For industrial products (IND), this range is -40°C to
+85°C.
OE
WE
WP
DH
Fail Detect to
slew from V
slew from 0V to V
Valid to
Valid to End of Write Protection
WE
, t
is specified as the logical AND of
= V
is high for a Read Cycle.
DS
CE
CE
is low or the
are measured from the earlier of
IH
or V
low transition occurs simultaneously with or latter than the
high transition occurs prior to or simultaneously with the
CE
TP
and
IL
DR
. If
CE
to 0V
is defined as accumulative time in the absence of V
WE
OE
and
TP
DR
WE
is defined as accumulative time in the absence of V
Inactive
= V
WE
low transition occurs prior to or simultaneously with the
CE
IH
Inactive
during write cycle, the output buffers remain in a high impedance state.
or
WE
going high.
SYMBOL
SYMBOL
CE
CE
t
t
t
t
REC
or
and
t
t
DR
PD
PU
R
F
WE
8 of 10
WE
going high.
. t
MIN
MIN
150
150
WP
10
is measured from the latter of
TYP
TYP
CC
WE
WE
MAX
MAX
starting from the time power
125
1.5
2
high transition, the output
low transition, the output
CC
CC
(T
starting from the time
A
is first applied by the
: See Note 10)
UNITS
UNITS
CC
CE
years
ms
ms
(T
µs
µs
µs
.
low transition,
A
= +25°C)
DS1245Y/AB
CE
NOTES
NOTES
or
11
9
WE
CC
.

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