DS2406 Maxim, DS2406 Datasheet - Page 23

• Manufacturer Part Number: DS2406
• Description: The DS2406 Dual Addressable Switch Plus Memory offers a simple way to remotely control a pair of open drain transistors and to monitor the logic level at each transistor's output via the 1-Wire® bus for closed loop control
• Manufacturer: Maxim

1-WIRE SIGNALING
The DS2406 requires strict protocols to ensure data integrity. The protocol consists of five types of
signaling on one line: Reset Sequence with Reset Pulse and Presence Pulse, Write 0, Write 1, Read Data,
and Program Pulse. Except for the presence pulse the bus master initiates all these signals.
The initialization sequence required to begin any communication with the DS2406 is shown in Figure 14.
A reset pulse followed by a presence pulse indicates the DS2406 is ready to send or receive data. The bus
master transmits (TX) a reset pulse (t
goes into receive mode (RX). The 1-Wire bus is pulled to a high state via the pull-up resistor. After
detecting the rising edge on the data pin, the DS2406 waits (t
presence pulse (t
INITIALIZATION PROCEDURE “RESET AND PRESENCE PULSES” Figure 14
READ/WRITE TIME SLOTS
The definitions of write and read time slots are illustrated in Figure 15. The master initiates all time slots
by driving the data line low. The falling edge of the data line synchronizes the DS2406 to the master by
triggering an internal delay circuit. During write time slots, the delay circuit determines when the DS2406
will sample the data line. For a read data time slot, if a “0” is to be transmitted, the delay circuit
determines how long the DS2406 will hold the data line low. If the data bit is a “1”, the DS2406 will not
hold the data line low at all.
* In order not to mask interrupt signaling by other devices on the 1-Wire bus, t
V
PULLUP MIN
always be less than 960µs. In a parasitically powered environment t
maximum 5ms. Otherwise the DS2406 may perform a power-on reset.
V
V
PULLUP
V
IL MAX
IH MIN
0V
PDL
RESISTOR
MASTER
DS2406
, 60-240µs).
"RESET PULSE"
MASTER TX
t
RSTL
RSTL
480 µs ≤ t
480 µs ≤ t
15 µs ≤ t
60 ≤ t
, minimum 480µs). The bus master then releases the line and
PDL
t
R
PDH
< 240 µs
RSTL
RSTH
23 of 32
MASTER RX "PRESENCE PULSE"
< 60 µs
t
PDH
<
<
∞
∞
*
(includes recovery time)
t
PDL
PDH
t
RSTH
, 15-60µs) and then transmits the
RSTL
should be limited to
RSTL
+ t
R
should