DS2431-A1 Maxim, DS2431-A1 Datasheet - Page 14

• Manufacturer Part Number: DS2431-A1
• Description: The DS2431-A1 is an AEC-Q100 Grade 1 qualified version of the DS2431
• Manufacturer: Maxim

1024-Bit, 1-Wire EEPROM
for Automotive Applications
To maximize the data throughput in a multidrop envi-
ronment, the Resume function is available. This function
checks the status of the RC bit and, if it is set, directly
transfers control to the Memory functions, similar to a
Skip ROM command. The only way to set the RC bit is
through successfully executing the Match ROM or
Search ROM command. Once the RC bit is set, the
device can repeatedly be accessed through the
Resume command function. Accessing another device
on the bus clears the RC bit, preventing two or more
devices from simultaneously responding to the Resume
command function.
The DS2431-A1 requires strict protocols to ensure data
integrity. The protocol consists of four types of signal-
ing on one line: reset sequence with reset pulse and
presence pulse, write-zero, write-one, and read-data.
Except for the presence pulse, the bus master initiates
all falling edges.
To get from idle to active, the voltage on the 1-Wire line
needs to fall from V
from active to idle, the voltage needs to rise from
V
voltage to make this rise is seen in Figure 10 as ε, and
its duration depends on the pullup resistor (R
and the capacitance of the 1-Wire network attached.
The voltage V
determining a logical level, not triggering any events.
Figure 10 shows the initialization sequence required to
begin any communication with the DS2431-A1. A reset
pulse followed by a presence pulse indicates that the
DS2431-A1 is ready to receive data, given the correct
ROM and memory function command. If the bus master
uses slew-rate control on the falling edge, it must pull
down the line for t
14
ILMAX
______________________________________________________________________________________
past the threshold V
ILMAX
RSTL
PUP
is relevant for the DS2431-A1 when
+ t
below the threshold V
F
to compensate for the edge.
TH
1-Wire Signaling
. The time it takes for the
Resume [A5h]
PUP
TL
. To get
) used
After the bus master has released the line it goes into
receive mode. Now the 1-Wire bus is pulled to V
through the pullup resistor, or in the case of a DS2482-
x00 or DS2480B driver, through the active circuitry.
When the threshold V
waits for t
pulling the line low for t
pulse, the master must test the logical state of the
1-Wire line at t
The t
t
t
munication. In a mixed population network, t
should be extended to minimum 480µs to accommo-
date other 1-Wire devices.
Data communication with the DS2431-A1 takes place in
time slots, which carry a single bit each. Write-time slots
transport data from bus master to slave. Read-time slots
transfer data from slave to master. Figure 11 illustrates
the definitions of the write- and read-time slots.
All communication begins with the master pulling the
data line low. As the voltage on the 1-Wire line falls
below the threshold V
nal timing generator that determines when the data line
is sampled during a write-time slot and how long data
is valid during a read-time slot.
For a write-one time slot, the voltage on the data line
must have crossed the V
one low time t
slot, the voltage on the data line must stay below the
V
expired. For the most reliable communication, the volt-
age on the data line should not exceed V
the entire t
has been crossed, the DS2431-A1 needs a recovery
time t
RSTH
PDHMAX
TH
threshold until the write-zero low time t
REC
RSTH
is expired, the DS2431-A1 is ready for data com-
, t
PDH
before it is ready for the next time slot.
W0L
PDLMAX
window must be at least the sum of
W1LMAX
MSP
and then transmits a presence pulse by
or t
.
W1L
, and t
TL
is expired. For a write-zero time
TH
window. After the V
, the DS2431-A1 starts its inter-
TH
Read-/Write-Time Slots
PDL
is crossed, the DS2431-A1
RECMIN
threshold before the write-
. To detect a presence
. Immediately after
Master-to-Slave
ILMAX
TH
W0LMIN
threshold
during
RSTH
PUP
is