DS2505 Maxim, DS2505 Datasheet - Page 12

• Manufacturer Part Number: DS2505
• Manufacturer: Maxim

DS2505
With the next 24 read data time slots the master will receive the Redirection Byte of the next page
followed by a 16-bit CRC of the Redirection Byte. After this, data is again read from the 16,384-bit
EPROM data field starting at the beginning of the new page. This sequence will continue until the final
page and its accompanying CRC are read by the bus master.
The Extended Read Memory command provides a 16-bit CRC at two locations within the transaction
flow chart: 1) after the Redirection Byte and 2) at the end of each memory page. The CRC at the end of
the memory page is always the result of clearing the CRC generator and shifting in the data bytes
beginning at the first addressed memory location of the EPROM data page until the last byte of this page.
The CRC received by the bus master directly following the Redirection Byte, is calculated in two
different ways. With the initial pass through the Extended Read Memory flow chart the 16-bit CRC
value is the result of shifting the command byte into the cleared CRC generator, followed by the
2 address bytes and the Redirection Byte. Subsequent passes through the Extended Read Memory flow
chart will generate a 16-bit CRC that is the result of clearing the CRC generator and then shifting in the
Redirection Byte only.
After the 16-bit CRC of the last page is read, the bus master will receive logical 1s from the DS2505 until
a Reset Pulse is issued. The Extended Read Memory command sequence can be exited at any point by
issuing a Reset Pulse.
WRITE MEMORY [0FH]/SPEED WRITE MEMORY [F3]
The Write Memory command is used to program the 16384-bit EPROM data field. The bus master will
follow the command byte with a 2-byte starting address (TA1=(T7:T0), TA2=(T15:T8)) and a byte of
data (D7:D0). A 16-bit CRC of the command byte, address bytes, and data byte is computed by the
DS2505 and read back by the bus master to confirm that the correct command word, starting address, and
data byte were received.
The highest starting address within the DS2505 is 07FFH. If the bus master sends a starting address
higher than this, the 5 most significant address bits are set to 0 by the internal circuitry of the chip. This
will result in a mismatch between the CRC calculated by the DS2505 and the CRC calculated by the bus
master, indicating an error condition.
If the CRC read by the bus master is incorrect, a reset pulse must be issued and the entire sequence must
be repeated. If the CRC received by the bus master is correct, a programming pulse (12 volts on the
1-Wire bus for 480 µs) is issued by the bus master. Prior to programming, the entire unprogrammed
16384-bit EPROM data field will appear as logical 1s. For each bit in the data byte provided by the bus
master that is set to a logical 0, the corresponding bit in the selected byte of the 16384-bit EPROM will be
programmed to a logical 0 after the programming pulse has been applied at that byte location.
After the 480 µs programming pulse is applied and the data line returns to the idle level, the bus master
issues eight read time slots to verify that the appropriate bits have been programmed. The DS2505
responds with the data from the selected EPROM address sent least significant bit first. This byte
contains the logical AND of all bytes written to this EPROM data address. If the EPROM data byte
contains 1s in bit positions where the byte issued by the master contained 0s, a reset pulse should be
issued and the current byte address should be programmed again. If the DS2505 EPROM data byte
contains 0s in the same bit positions as the data byte, the programming was successful and the DS2505
will automatically increment its address counter to select the next byte in the 16384-bit EPROM data
field. The new 2-byte address will also be loaded into the 16-bit CRC generator as a starting value. The
bus master will issue the next byte of data using eight write time slots.
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