DS1318 Maxim, DS1318 Datasheet

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DS1318

Manufacturer Part Number
DS1318
Description
The DS1318 parallel-interface elapsed time counter (ETC) is a 44-bit counter that maintains the amount of time that the device operates from main and/or backup power or during an external event
Manufacturer
Maxim
Datasheet

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The DS1318 parallel-interface elapsed time counter
(ETC) is a 44-bit counter that maintains the amount of
time that the device operates from main and/or backup
power or during an external event. The internal
frequency of the counter clock is 4.096kHz, which pro-
vides a 244µs resolution and a maximum count of over
136 years. A built-in power-sense circuit detects power
failures, automatically switches to the backup supply,
and controls the timer. If an external event timer is
desired, the control input EXT can control the counter
operation. An open-drain output provides an interrupt,
and a square-wave output provides a programmable
square wave. The DS1318 is accessed through a byte-
wide parallel interface, and operates over the industrial
temperature range.
19-5664; Rev 1; 12/10
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
CPU
Power Meters
Industrial Controls
Servers
RPU
Typical Operating Circuit
IRQ
WE
OE
CE
A3–A0
DQ–DQ7
Parallel-Interface Elapsed Time Counter
General Description
DS1318
GND
V
V
SQW
V
CC
CC
EXT
BAT
X1
X2
Applications
______________________________________________ Maxim Integrated Products
EXTERNAL
COUNTER
ENABLE
(EVENT TIMER)
0.1μF
♦ Byte-Wide Parallel Interface
♦ 44-Bit Binary Counter Provides Timer with 244µs
♦ Automatic Power-Fail Detect and Switch Circuitry
♦ Internal Power-Fail Circuit Allows Timer to
♦ Timer can Alternately Provide an Event Timer of
♦ Interrupt Output Generated Periodically or When
♦ Square-Wave Output with 16 Selectable
♦ +3.3V Operation
♦ Industrial Temperature Range: -40°C to +85°C
♦ Underwriters Laboratories (UL) Recognized
+ Denotes a lead(Pb)-free/RoHS-compliant package.
T&R = Tape and reel.
DS1318E+
DS1318E+T&R
Resolution
Selects Power Source from the Primary Power
and the Battery, and Write Protects the Internal
Registers
Provide Primary or Battery Operation Times
Either an Active-High or Active-Low Pulse
the Upper 32 Bits of the Counter Match an Alarm
Register
Frequencies from 32.768kHz to 0.5Hz
TOP VIEW
PART
GND
GND
DQ0
DQ1
DQ2
EXT
X1
X2
A3
A2
A1
A0
1
2
3
4
5
6
7
8
9
10
11
12
+
-40°C to +85°C
-40°C to +85°C
TEMP RANGE
Ordering Information
(4.4mm)
TSSOP
DS1318
Pin Configuration
PIN-PACKAGE
24 TSSOP
24 TSSOP
24
23
22
21
20
19
18
17
16
15
14
13
Features
V
V
IRQ
SQW
WE
OE
CE
DQ7
DQ6
DQ5
DQ4
DQ3
CC
BAT
1

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DS1318 Summary of contents

Page 1

... If an external event timer is desired, the control input EXT can control the counter operation. An open-drain output provides an interrupt, and a square-wave output provides a programmable square wave. The DS1318 is accessed through a byte- wide parallel interface, and operates over the industrial temperature range. Applications ...

Page 2

... For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability ...

Page 3

Parallel-Interface Elapsed Time Counter DC ELECTRICAL CHARACTERISTICS ( 3.7V -40°C to +85°C, unless otherwise noted.) (Note 2) CC BAT A PARAMETER SYMBOL Battery Input Current (ENOSC = 1) Battery Input Current I BATDR (ENOSC ...

Page 4

Parallel-Interface Elapsed Time Counter A0–A4 DQ0–DQ7 A0– DQ0–DQ7 A0– DQ0–DQ7 4 _____________________________________________________________________ CEA t CEL t OE OEA t OEL VALID Write Cycle Timing, Write-Enable Controlled t WC VALID t ...

Page 5

Parallel-Interface Elapsed Time Counter PF(MAX) V PF(MIN) t VCCF RECOGNIZED INPUTS VALID OUTPUTS POWER-UP/POWER-DOWN CHARACTERISTICS (T = -40°C to +85°C) (Note 2) A PARAMETER SYMBOL Recovery at Power-Up V Fall Time PF(MAX ...

Page 6

Parallel-Interface Elapsed Time Counter AC TEST CONDITIONS PARAMETER Input Pulse Levels Output Load Including Scope and Jig Input and Output Timing Measurement Reference Levels Input-Pulse Rise and Fall Times WARNING: Under no circumstances are negative undershoots, of any amplitude, allowed ...

Page 7

... BUFFERED COUNTER REGISTERS, CONTROL AND STATUS REGISTERS SUBSECONDS0 SUBSECONDS0 SUBSECONDS1 SUBSECONDS1 SECONDS0 SECONDS0 SECONDS1 SECONDS1 SECONDS2 SECONDS2 SECONDS3 SECONDS3 ALARM0 INTERNAL DIVIDERS AND COUNTERS ALARM1 ALARM2 ALARM3 CONTROL A CONTROL B STATUS Functional Diagram SQUARE-WAVE SQW RATE SELECTOR AND PRESCALER DS1318 IRQ PF/ALMF MUX 7 ...

Page 8

Parallel-Interface Elapsed Time Counter PIN NAME Connections for Standard 32.768kHz Quartz Crystal. The internal oscillator circuitry is designed for 1 X1 operation with a crystal having a 12.5pF specified load capacitance (C oscillator and can optionally be connected to an ...

Page 9

... A GROUND PLANE BETWEEN THE SIGNAL LINE AND THE DEVICE PACKAGE. Figure 2. Layout Example An external 32.768kHz oscillator can also drive the DS1318. In this configuration, the X1 pin is connected to the external oscillator signal and the X2 pin is left unconnected. The accuracy of the clock is dependent upon the accu- ...

Page 10

Parallel-Interface Elapsed Time Counter Table 3. Address Map ADDRESS BIT 7 BIT 6 BIT 5 00h SS3 SS2 01h SS11 SS10 02h S7 S6 03h S15 S14 04h S23 S22 05h S31 S30 06h ALM7 ALM6 ALM5 07h ALM15 ALM14 ...

Page 11

... Bit 1: Periodic Interrupt Enable (PIE). When PIE is set to logic 1, the DS1318 sets the IRQ pin low whenever the PF flag is set to 1. When PIE is 0, the PF flag does not affect the IRQ pin. ...

Page 12

Parallel-Interface Elapsed Time Counter BIT 7 BIT 6 BIT 5 PRS3 PRS2 PRS1 Bits Periodic Rate Select (PRS3–PRS0). When the oscillator is enabled (ENOSC = 1) the PF flag is set at the rates determined by the ...

Page 13

Parallel-Interface Elapsed Time Counter BIT 7 BIT 6 BIT 5 OSF UIP Bit 7: Oscillator Stop Flag (OSF). A logic 1 in this bit indicates that the oscillator either is or was stopped for some period of time and may ...

Page 14

... Package Information For the latest package outline information and land patterns www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. ...

Page 15

... BAT Package Information table Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 15 © ...

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