MAX7302 Maxim, MAX7302 Datasheet
MAX7302
Related parts for MAX7302
MAX7302 Summary of contents
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... The MAX7302 includes an internal oscillator for PWM, blink, and key debounce cascade multiple MAX7302s. The external clock can be used to set a spe- cific PWM and blink timing. The RST input asynchronous- ly clears the 2-wire interface and terminates a bus lockup involving the MAX7302 ...
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... Current ........................................................................35mA LA Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability ...
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Level-Translating GPIO and LED Driver with CLA PORT, INTERRUPT (INT), AND RESET (RST) TIMING CHARACTERISTICS (V = 1.62V to 3.6V MAX DD MIN (Figures 10, 15, 16 and 17) PARAMETER Oscillator Frequency Port Output ...
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SMBus/I C Interfaced 9-Port, Level-Translating GPIO and LED Driver with CLA (V = 3.3V 3.3V and T = +25°C, unless otherwise noted STANDBY CURRENT vs. TEMPERATURE 2.0 INTERFACE IDLE 1.8 INTERNAL OSCILLATOR DISABLED 1.6 ...
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... SMBus/I C Interfaced 9-Port, Typical Operating Characteristics (continued) CLA PROPAGATION DELAY OUTPUT FALLING MAX7302 toc11 C = 100pF L PORT2 2V/div PORT3 2V/div PORT5 2V/div 40ns/div CLA PROPAGATION DELAY OUTPUT RISING MAX7302 toc10 C = 100pF L PORT2 2V/div PORT3 2V/div PORT5 2V/div 40ns/div 5 ...
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SMBus/I C Interfaced 9-Port, Level-Translating GPIO and LED Driver with CLA PIN NAME QSOP TQFN AD0 RST P1/INT 5 3 P2/OSCIN 6 4 P3/OSCOUT ...
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... Each port configured as an open-drain or push-pull output can sink up to 25mA. Push-pull outputs also have a 5mA source drive capability. The MAX7302 is rated to sink a total of 100mA into any combination of _______________________________________________________________________________________ 2 SMBus/I ...
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SMBus/I C Interfaced 9-Port, Level-Translating GPIO and LED Driver with CLA Table 1. Register Address Map REGISTER Port P1 or INT Output Port P2 or OSCIN Input Port P3 or OSCOUT Output Port P4 Port P5 Port P6 Port ...
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Level-Translating GPIO and LED Driver with CLA Table 3. Configuration Register (0x26) REGISTER BIT DESCRIPTION Interrupt status flag D7 (read only) Transition flag D6 (read only) D5 Reserved Blink prescalor bits D4, D3, D2 RST timer D1 RST POR D0 ...
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... MSB (bit D7) of the port I/O register. See Figures 2 and 3 for output port structure. The device reads back the logic level, PWM, or the blink setting of the port (see Table 7). The MAX7302 monitors the logic level of ports configured as CLA outputs (see the Configurable Logic Array (CLA) section). ...
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Level-Translating GPIO and LED Driver with CLA PORT_ [2] (DEBOUNCE) PORT_ [0] 0 (PORTIN) 1 TRANSITION DETECTION INT Figure 1. Input Port Structure Table 7. Port I/O Registers (I/O Port Set as an Output, Registers 0x01 to 0x09) REGISTER BIT ...
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... When a port I/O register is locked as an input, only bits D0 and D1 can change, and the locked input behaviour options, such as debounce and transition detection, operate as normal. The MAX7302 samples the input ports every 31ms if input debouncing is enabled for an input port ( voltage is greater LA of the port I/O register) ...
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... MAX7302 from the bus. RST also operates as a chip enable, allowing multiple devices to use the same I MAX7302 has its RST input high at any time. RST can be configured to restore all port registers to the power- up settings by setting bit D0 of device configuration reg- ister 0x26 (Table 1) ...
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... V Standby Mode Use OSCOUT or an external clock source to cascade up to four MAX7302s per master for applications requir- ing additional ports. To synchronize the blink action across multiple MAX7302s (see Figures 4 and 5), use OSCOUT from one MAX7302 to drive OSCIN of the other MAX7302s ...
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... OSCIN can range up to 1MHz. Use device configuration register 0x27 bit D3 (see Table 4) to con- figure port P3 as OSCOUT to output a MAX7302’s clock. The MAX7302 buffers the clock output of either the internal oscillator OSC or the external clock source OSCIN, according to port D2’s setup. Synchronize mul- ...
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SMBus/I C Interfaced 9-Port, Level-Translating GPIO and LED Driver with CLA PORT REGISTER VALUE 0b0X000000 OUTPUT STATIC LOW (STATIC LOGIC-LOW OUTPUT OR LED DRIVE ON) 0b0X000001 OUTPUT LOW 1/32 DUTY PWM 0b0X000010 OUTPUT LOW 2/32 DUTY PWM 0b0X000011 OUTPUT ...
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Level-Translating GPIO and LED Driver with CLA Table 10. Blink and PWM Frequencies BLINK OR PWM SETTING 0.125H z) Blink period is 4s (0.25Hz) Blink period is 2s (0.5Hz) ...
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SMBus/I C Interfaced 9-Port, Level-Translating GPIO and LED Driver with CLA Table 12. CLA0 (P2–P5) Configuration Register Setting (0x28) (continued) FUNCTION 2 input AND/OR P2 and P3 noninverted 2 input AND/OR P2 and P3 inverted 2 input AND/OR P2 ...
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Level-Translating GPIO and LED Driver with CLA Table 14. CLA1 (P6–P9) Configuration Register Setting (0x29) (continued) FUNCTION 2 input AND/OR P6 and P8 noninverted 2 input AND/OR P6 and P8 inverted 2 input AND/OR P6 inverted and P8 2 input ...
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... RSTPOR bit in the configure register. Each lock bit can only be written to once per power cycle. A CLA’s input(s) and output can be read through the serial interface like a normal input port. The MAX7302 creates a gate that provides an independent real-time logic function, and every node of it can be examined through the I transition detection ...
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Level-Translating GPIO and LED Driver with CLA ENABLE P2 DEBOUNCE PIN P2 INVERT P2 DEBOUNCE PIN P3 INVERT P3 ENABLE P3 ENABLE P4 DEBOUNCE PIN P4 INVERT P4 INVERT P5 P5 OUTPUT REGISTER PIN CLA/GPIO ENABLE EXOR23 ...
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... Figure 11. START and STOP Conditions 22 ______________________________________________________________________________________ Each transmission consists of a START condition (see Figure 11) sent by a master, followed by the MAX7302 7-bit slave address plus R/W bit, a register address byte, one or more data bytes, and finally a STOP condition (see Figure 11). Both SCL and SDA remain high when the interface is not busy ...
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... Figure 16). The first byte of information is the command byte. The command byte determines which register of the MAX7302 written to by the next byte, if received STOP condition is detected after the command byte is received, the MAX7302 takes no further action beyond storing the command byte (see Figure 15) ...
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... IV Figure 18. Interrupt and Reset Timing Operation with Multiple Masters If the MAX7302 is operated on a 2-wire interface with multiple masters, a master reading the MAX7302 should use a repeated start between the write that sets the MAX7302’s address pointer, and the read(s) that takes the data from the location(s) ...
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... LA a 90mA white LED with four ports. The register structure of the MAX7302 allows only one port to be manipulated at a time. Do not connect ports directly in parallel because multiple ports cannot be switched high or low at the same time, which is neces- sary to share a load safely ...
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... RST 3 MAX7302 P1/INT 4 P2/OSCIN 5 P3/OSCOUT QSOP Chip Information PROCESS: BiCMOS 26 ______________________________________________________________________________________ SDA 13 SDA 14 SCL AD0 10 GND 9 P6 *EP = Exposed pad. Pin Configurations GND MAX7302 TQFN ...
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... Level-Translating GPIO and LED Driver with CLA (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information www.maxim-ic.com/packages.) ______________________________________________________________________________________ 2 SMBus/I C Interfaced 9-Port, Package Information 27 ...
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... SMBus/I C Interfaced 9-Port, Level-Translating GPIO and LED Driver with CLA (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information www.maxim-ic.com/packages.) E MARKING E/2 AAAA D 0. ______________________________________________________________________________________ Package Information (continued) ...
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... Level-Translating GPIO and LED Driver with CLA (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information www.maxim-ic.com/packages.) PKG 8L 3x3 12L 3x3 REF. MIN. NOM. MAX. MIN. NOM. MAX. A 0.70 0.75 0.80 0.70 0.75 0.80 b 0.25 0.30 0.35 0.20 0.25 0. ...
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... QSOP. Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 30 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © ...