MAX7310 Maxim, MAX7310 Datasheet

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MAX7310

Manufacturer Part Number
MAX7310
Description
The MAX7310 provides 8-bit parallel input/output port expansion for SMBus™-compatible and I²C-compatible applications
Manufacturer
Maxim
Datasheet

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The MAX7310 provides 8-bit parallel input/output port
expansion for SMBus™-compatible and I
applications. The MAX7310 consists of an input port
register, an output port register, a polarity inversion reg-
ister, a configuration register, a bus timeout register,
and an SMBus/I
tem master can invert the MAX7310 input data by writ-
ing to the active-high polarity inversion register. The
system master can enable or disable bus timeout by
writing to the bus timeout register.
Any of the eight I/O ports may be configured as input or
output. An active-low reset input sets the eight I/Os as
inputs. Three address select pins configure one of 56
slave ID addresses.
The MAX7310 is available in 16-pin thin QFN, TSSOP,
and QSOP packages and is specified over the -40°C to
+125°C automotive temperature range.
19-2698; Rev 3; 2/05
SMBus is a trademark of Intel Corp.
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Servers
RAID Systems
Industrial Control
Medical Equipment
Instrumentation, Test Measurement
2
TOP VIEW
2-Wire-Interfaced 8-Bit I/O Port Expander
C-compatible serial interface. The sys-
________________________________________________________________ Maxim Integrated Products
General Description
GND
SCL
SDA
AD0
AD1
AD2
I/O0
I/O1
1
2
3
4
5
6
7
8
TSSOP/QSOP
MAX7310
Applications
2
C-compatible
16
15
14
13
12
11
10
9
V+
RESET
I/O7
I/O6
I/O5
I/O4
I/O3
I/O2
RESET
SCL
SDA
V+
13
14
15
16
♦ 400kHz 2-Wire Interface
♦ 2.3V to 5.5V Operation
♦ Low Standby Current (1.7µA typ)
♦ Bus Timeout for Lock-Up-Free Operation
♦ 56 Slave ID Addresses
♦ Polarity Inversion
♦ Eight I/O Pins that Default to Inputs on Power-Up
♦ 5V Tolerant Open-Drain Output on I/O0
♦ 4mm x 4mm, 0.8mm Thin QFN Package
♦ -40°C to +125°C Operation
MAX7310AUE
MAX7310AEE
MAX7310ATE
12
1
PART
THIN QFN
MAX7310ATE
11
2
10
3
-40°C to +125°C 16 TSSOP
-40°C to +125°C 16 QSOP
-40°C to +125°C 16 Thin QFN T1644-4
TEMP RANGE
4
9
Ordering Information
8
7
6
5
Pin Configurations
I/O3
I/O2
GND
I/O1
with Reset
PIN-
PACKAGE
Features
PKG
CODE
1

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MAX7310 Summary of contents

Page 1

... SMBus/I C-compatible serial interface. The sys- tem master can invert the MAX7310 input data by writ- ing to the active-high polarity inversion register. The system master can enable or disable bus timeout by writing to the bus timeout register. ...

Page 2

... Maximum GND and V+ Current........................................180mA Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability ...

Page 3

... Reset Pulse Width Note 1: All parameters are 100% production tested at T Note 2: Minimum SCL clock frequency is limited by the MAX7310 bus timeout feature, which resets the serial bus interface if either SDA or SCL is held low for a 30ms minimum. Note 3: A master device must internally provide a hold time of at least 300ns for the SDA signal (referred to the V order to bridge the undefined region of SCL’ ...

Page 4

I/O Port Expander with Reset (T = +25°C, unless otherwise noted.) A SUPPLY CURRENT vs. TEMPERATURE 3.3V 440kHz, SCL NO LOAD ON I/O0–I/ -40 -25 -10 5 ...

Page 5

... Figure 1. MAX7310 Block Diagram Detailed Description The MAX7310 general-purpose input/output (GPIO) peripheral provides up to eight I/O ports, controlled 2 through an I C-compatible serial interface. The MAX7310 consists of an input port register, an output _______________________________________________________________________________________________________ FUNCTION Serial Clock Line Serial Data Line Address Input 0 Address Input 1 ...

Page 6

... MAX7310, and generates the SCL clock that synchro- nizes the data transfer (Figure 2). Each transmission consists of a start condition sent by a master, followed by the MAX7310 7-bit slave address plus an R/W bit, a register address byte, one or more data bytes, and finally a stop condition (Figure 3). ...

Page 7

... SDA MSB SCL Figure 6. Slave Address The first bits (MSBs) of the MAX7310 slave address are always zero. Slave address bits AD2, AD1, and AD0 choose slave ID addresses (Table 7). The register address byte is the first byte to follow the address byte during a read/write transmission. The reg- _______________________________________________________________________________________ DATA LINE STABLE ...

Page 8

... SCL stops register. either high or low during a read or write access to the MAX7310. If either SCL or SDA is low for more than 30ms min and 60ms max after the start of a valid serial transfer, the interface resets itself. Resetting the serial ...

Page 9

... I/O Port Expander Table 7. MAX7310 Address Map AD2 AD1 AD0 GND SCL GND GND SCL V+ GND SDA GND GND SDA V+ V+ SCL GND V+ SCL V+ V+ SDA GND V+ SDA V+ GND GND SCL GND GND SDA GND V+ SCL GND V+ SDA V+ GND SCL ...

Page 10

... GND V+ SDA V+ GND SDA V+ V+ Applications Information Power-Supply Consideration The MAX7310 operates from a supply voltage of 2.3V to 5.5V. Bypass the power supply to GND with a 0.047µF capacitor as close to the device as possible. For the QFN version, connect the underside exposed pad to GND. 10 ______________________________________________________________________________________ ...

Page 11

I/O Port Expander DATA FROM SHIFT REGISTER CONFIGURATION REGISTER DATA FROM D Q SHIFT REGISTER WRITE K CONFIGURATION PULSE WRITE PULSE READ PULSE DATA FROM SHIFT REGISTER WRITE POLARITY PULSE Figure 7. Simplified Schematic of ...

Page 12

I/O Port Expander with Reset DATA FROM SHIFT REGISTER CONFIGURATION REGISTER DATA FROM D Q SHIFT REGISTER FF WRITE CONFIGURATION PULSE WRITE PULSE READ PULSE DATA FROM SHIFT REGISTER WRITE POLARITY PULSE Figure 8. Simplified ...

Page 13

I/O Port Expander SCL SLAVE ADDRESS SDA START CONDITION WRITE TO PORT DATA OUT FROM PORT Figure 9. Write to Output Port Register Through ...

Page 14

... I/O Port Expander with Reset (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information www.maxim-ic.com/packages.) 14 ______________________________________________________________________________________ Package Information PACKAGE OUTLINE 12, 16, 20, 24L THIN QFN, 4x4x0.8mm 1 21-0139 C 2 PACKAGE OUTLINE 12, 16, 20, 24L THIN QFN, 4x4x0 ...

Page 15

... For the latest package outline information www.maxim-ic.com/packages.) Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. ...

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