MAX11041 Maxim, MAX11041 Datasheet
MAX11041
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MAX11041 Summary of contents
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... The MAX11041 includes ±15kV ESD protection devices on the FORCE and SENSE inputs to ensure IEC 61000-4-2 compliance without any external ESD devices. The MAX11041 is available in a 12-pin TQFN package. The device is specified over the extended temperature range (-40°C to +85°C). Multimedia Controls for ...
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... Human Body Model, FORCE, SENSE............................±15kV Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability ...
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ELECTRICAL CHARACTERISTICS (continued +1.6V to 3.6V 10nF SENSE PARAMETER SYMBOL DIGITAL OUTPUTS (SDA, INT) Output High Voltage (INT) Output Low Voltage (INT) V Output High Leakage Current Output Low Voltage (SDA ...
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Wired Remote Controller ELECTRICAL CHARACTERISTICS (continued +1.6V to 3.6V 10nF SENSE PARAMETER SYMBOL POWER SUPPLIES Power-Supply Voltage Average Operational Supply Current Shutdown Power-Supply Current I DDSHDN Jack Current I DDJACK Key Current I DDBUTTON ...
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... DEBOUNCE KEY ADDED µP READS TO FIFO 10ms/div 1.00 0.75 0.50 0. -40° 2.6 3.1 3.6 (V) KEYPRESS RELEASE SCOPE SHOT* V SENSE INT DEBOUNCE KEY ADDED FIFO TO FIFO 10ms/div V SHUTDOWN SUPPLY CURRENT DD vs. VOLTAGE NO JACK INSERTED T = +85° -40° +25°C A 1.6 2.1 2.6 3.1 3.6 V (V) DD MAX11041 TOC03 µP READS FIFO 5 ...
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... I C Address Input 1. Logic state represents bit 1 of the Address Input 0. Logic state represents bit 0 of the I Active-Low Shutdown Input. Bring SHDN low to put the MAX11041 in shutdown mode. FORCE SHDN 7 high-impedance state while SHDN is low SCL I C Serial-Interface Clock Input ...
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... Figure 2. Recommended FORCE and SENSE Configuration Table 1. Control Register BITS READ/WRITE POWER-UP STATE C7 R C4–C0 — Table 2. FIFO Data Format FIFO DATA Keypress type (MAX11041) Keypress duration X = Don’t care. ____________________________________________________________________________________ Wired Remote Controller WIRED REMOTE CONTROLLER R SW0 10kΩ R SW1 JACK/PLUG CONNECTION R SW30 ...
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... CHIP ID I7 MAX11041 0 Keypress Detection and Debounce At power-up, the MAX11041 begins to monitor the SENSE input for keypresses. When the MAX11041 detects a keypress at SENSE, it attempts to debounce the SENSE input. After successful debouncing of the input, the corresponding keypress result is inserted into the FIFO. In addition, INT goes low to signal a keypress to the µ ...
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... BYTE 2 I7–I0 A C7–C0 A The only write to the MAX11041 that is possible is to the control register (C7–C0). Use the following sequence to write to the control register (see Figure 5): 1) After generating a START condition (S), address the MAX11041 by sending the appropriate slave address byte with its corresponding R/W bit set (see the Slave Address and R/W Bit section) ...
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... A0) determine the last two LSBs of the device address (see Figure 6). Connect A1 and mum of four MAX11041 devices can be connected on the same bus at one time using these address inputs. The 8th bit of the address byte is a read/write bit (R/W). ...
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... Table 4. Required Resistor Set for the MAX11041 STANDARD 1% KEY RESISTOR VALUE (Ω 1470 2 2550 3 3740 4 4990 5 6340 6 7680 7 9310 8 11000 9 13000 10 15000 11 17400 12 20000 13 22600 14 26100 15 30100 16 34000 17 38300 18 44200 19 51100 20 59000 21 68100 22 80600 23 95300 24 118000 25 147000 26 191000 27 261000 28 402000 ...
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... Data transfers are acknowledged with an acknowledge bit (ACK not-acknowledge bit (NACK). Both the master and the MAX11041 generates ACK bits. To gen- erate an ACK, pull SDA low before the rising edge of the ninth clock pulse and keep it low during the high period of the ninth clock pulse (see Figure 8) ...
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Simultaneous Keypress Detection Certain applications require the detection of simultaneous keypresses, such as <SHIFT+KEY> and <FUNCTION+KEY> combinations. This is done in software. For instance, the µP detects the SHIFT key is being pressed. When the µP detects an additional key- ...
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Wired Remote Controller V SENSE INT 1 SHDN TRANSITION FROM LOW TO HIGH. READ WRITE POINTER POINTER 0xFF 0x00 0xFF 0x00 0xFF 0x00 0xFF 0x00 0xFF 0x00 0xFF 0x00 0x00 0xFF 0xFF 0x00 JACK INSERTION DETECTED AND ...
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... V DD 8-WORD FIFO 8-BIT DURATION KEY SCL INTERFACE SDA CONTROL LOGIC INT SHDN GND ___________________________________________________________________________________ Wired Remote Controller DURATION TIMER 8-BIT DEBOUNCE Functional Diagram MAX11041 FORCE KEY ±15kV ESD DETECTOR SENSE 15 ...
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... SHDN LOGIC INTERRUPT INT Chip Information PROCESS: BiCMOS 16 ______________________________________________________________________________________ 3.3V DAC DAC MAX9850 3. MAX11041 FORCE SENSE 10kΩ RESISTOR ESD DETECTOR 10nF DURATION TIMER A1 GND For the latest package outline information and land patterns www.maxim-ic.com/packages. PACKAGE TYPE 12 TQFN-EP Typical Operating Circuit ...
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... Removed the MAX11042 from the data sheet Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. ...