EL1881CSZ Intersil, EL1881CSZ Datasheet

IC VIDEO SYNC SEPARATOR 8SOIC

EL1881CSZ

Manufacturer Part Number
EL1881CSZ
Description
IC VIDEO SYNC SEPARATOR 8SOIC
Manufacturer
Intersil
Type
Synchronous Separatorr
Datasheet

Specifications of EL1881CSZ

Applications
Drivers, Communications, PCMCIA
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Synch Slicing
50%
Supply Current
1.2mA
Tv / Video Case Style
SOIC
No. Of Pins
8
Operating Temperature Range
-40°C To +85°C
Power Dissipation Pd
400mW
Termination Type
SMD
Rohs Compliant
Yes
Filter Terminals
SMD
Features
NTSC, PAL, SECAM, Low Power
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Company
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Manufacturer
Quantity
Price
Part Number:
EL1881CSZ
Manufacturer:
Intersil
Quantity:
582
Part Number:
EL1881CSZ
Manufacturer:
EL
Quantity:
20 000
Part Number:
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Intersil
Quantity:
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Part Number:
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Part Number:
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Quantity:
5 068
Part Number:
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Sync Separator, Low Power
The EL1881 video sync separator is manufactured using
Elantec’s high performance analog CMOS process. This
device extracts sync timing information from both standard
and non-standard video input. It provides composite sync,
vertical sync, burst/back porch timing, and odd/even field
detection. Fixed 70mV sync tip slicing provides sync edge
detection when the video input level is between 0.5V
-2V
external resistor sets all internal timing to adjust for various
video standards. The composite sync output follows video in
sync pulses and a vertical sync pulse is output on the rising
edge of the first vertical serration following the vertical pre-
equalizing string. For non-standard vertical inputs, a default
vertical pulse is output when the vertical signal stays low for
longer than the vertical sync default delay time. The
odd/even output indicates field polarity detected during the
vertical blanking interval. The EL1881 is plug-in compatible
with the industry-standard LM1881 and can be substituted
for that part in 5V applications with lower required supply
current.
The EL1881 is available in the 8-pin PDIP and SO packages
and is specified for operation over the full -40°C to +85°C
temperature range.
Ordering Information
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which is compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020C.
EL1881CN
EL1881CS
EL1881CS-T7
EL1881CS-T13
EL1881CSZ
(See Note)
EL1881CSZ-T7
(See Note)
EL1881CSZ-T13
(See Note)
PART NUMBER
P-P
(sync tip amplitude 143mV to 572mV). A single
PACKAGE
8-Pin PDIP
8-Pin SO
8-Pin SO
8-Pin SO
8-Pin SO
8-Pin SO
8-Pin SO
(Pb-free)
(Pb-free)
(Pb-free)
®
1
TAPE & REEL
Data Sheet
Copyright © Intersil Americas Inc. 2002-2004. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc.
13”
13”
7”
7”
-
-
-
MDP0031
MDP0027
MDP0027
MDP0027
MDP0027
MDP0027
MDP0027
DWG. #
P-P
PKG.
1-888-INTERSIL or 321-724-7143
and
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Features
• NTSC, PAL, SECAM, non-standard video sync separation
• Fixed 70mV slicing of video input levels from 0.5V
• Low supply current - 1.5mA typ.
• Single +5V supply
• Composite, vertical sync output
• Odd/even field output
• Burst/back porch output
• Available in 8-pin PDIP and SO packages
• Pb-free available
Applications
• Video amplifiers
• PCMCIA applications
• A/D drivers
• Line drivers
• Portable computers
• High-speed communications
• RGB applications
• Broadcast equipment
• Active filtering
Demo Board
A dedicated demo board is available.
Pinout
COMPOSITE SYNC OUT
COMPOSITE VIDEO IN
2V
VERTICAL SYNC OUT
October 20, 2004
P-P
All other trademarks mentioned are the property of their respective owners.
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
GND
(8-PIN PDIP, SO)
1
2
3
4
TOP VIEW
EL1881
8
7
6
5
BUST/BACK
PORCH OUTPUT
ODD/EVEN OUTPUT
V
R
DD
SET
EL1881
5V
FN7018.1
P-P
to

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EL1881CSZ Summary of contents

Page 1

... SO (Pb-free) (See Note) EL1881CSZ-T7 8-Pin SO (Pb-free) (See Note) EL1881CSZ-T13 8-Pin SO (Pb-free) (See Note) NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which is compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020C ...

Page 2

Absolute Maximum Ratings ( Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 3

Pin Descriptions PIN NUMBER PIN NAME 1 Composite Sync Out 2 Composite Video In 3 Vertical Sync Out 4 GND 5 Burst/Back Porch Output 6 RSET (Note 1) 7 Odd/Even Output 8 VDD 5V NOTE must be a ...

Page 4

Typical Performance Curves Supply Current vs Temperature R =681kΩ SET 1.65 5.5V 1.6 1.55 4.5V 1.5 1.45 1.4 1.35 -50 -25 0 Temperature (°C) Clamp Discharge Current vs Temperature R =681kΩ SET 11.4 11.3 5.5V 11.2 11.1 4.5V 11 10.9 ...

Page 5

Typical Performance Curves Burst/Back Porch Width =5V, T =25° 200 400 R Vertical Sync Width =5V, T =25° 350 300 250 200 150 100 ...

Page 6

Typical Performance Curves Burst/Back Porch Delay vs Temperature R =681kΩ SET 250 5.5V 200 150 4.5V 100 50 0 -50 -25 0 Temperature (°C) Vertical Sync Default Delay Time vs Temperature R =681kΩ SET 64.5 63.5 5.5V 62.5 5V 61.5 ...

Page 7

Timing Diagrams NOTES: b. The composite sync output reproduces all the video input sync pulses, with a propagation delay. c. Vertical sync leading edge is coincident with the first vertical serration pulse leading edge, with a propagation delay. d. Odd-even ...

Page 8

Expanded Timing Diagrams 8 EL1881C FIGURE 2. STANDARD VERTICAL TIMING FIGURE 3. NON-STANDARD VERTICAL TIMING FN7018.1 ...

Page 9

Applications Information Video In A simplified block diagram is shown following page coupled video signal is input to Video In pin 2 via nominally 0.1µF. Clamp charge current will prevent the signal on pin 2 from going any ...

Page 10

Vertical Sync A low-going Vertical Sync pulse is output during the start of the vertical cycle of the incoming video signal. The vertical cycle starts with a pre-equalizing phase of pulses with a duty cycle of about 93%, followed by ...

Page 11

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...

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