M74VHC1GT125DT1G ON Semiconductor, M74VHC1GT125DT1G Datasheet

M74VHC1GT125DT1G

Manufacturer Part Number

M74VHC1GT125DT1G

Description

IC BUFF CMOS LVL/SFTR N-I SOT235

Manufacturer

ON Semiconductor

Series

74VHCr

Datasheets

1.M74VHC1GT125DT1G.pdf (6 pages)

2.M74VHC1GT125DT1G.pdf (5 pages)

Specifications of M74VHC1GT125DT1G

Logic Type

Buffer/Line Driver, Non-Inverting

Number Of Elements

Number Of Bits Per Element

Current - Output High, Low

8mA, 8mA

Voltage - Supply

3 V ~ 5.5 V

Operating Temperature

-55°C ~ 125°C

Mounting Type

Surface Mount

Package / Case

TSOT-23-5, TSOT-5, TSOP-5

Logic Family

74VHC

Number Of Channels Per Chip

Single

Polarity

Non-Inverting

Supply Voltage (max)

5.5 V

Supply Voltage (min)

3 V

Maximum Operating Temperature

125 C

Mounting Style

SMD/SMT

High Level Output Current

- 8 mA

Input Bias Current (max)

1 uA

Low Level Output Current

8 mA

Maximum Power Dissipation

200 mW

Minimum Operating Temperature

- 55 C

Number Of Lines (input / Output)

Output Type

3-State

Propagation Delay Time

11.5 ns @ 3.3 V or 7.5 ns @ 5 V

Current, Supply

40 μA

Function Type

1-Channel

Logic Function

Buffer/Shifter

Number Of Circuits

Single

Package Type

TSOP-5/SOT23/SC-59

Special Features

Non-Inverting

Temperature, Operating, Range

-55 to +125 °C

Voltage, Supply

3 to 5.5 V

Logic Device Type

Buffer, Non Inverting

Supply Voltage Range

3V To 5.5V

Logic Case Style

SOT-23

No. Of Pins

Operating Temperature Range

-55Â°C To +125Â°C

Filter Terminals

SMD

Rohs Compliant

Yes

Family Type

VHC

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Other names

M74VHC1GT125DT1GOSTR

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Current page: 1 of 6
Download datasheet (90Kb)

MC74VHC1GT125

Noninverting Buffer /

CMOS Logic Level Shifter

with LSTTL−Compatible Inputs

fabricated with silicon gate CMOS technology. It achieves high speed

operation similar to equivalent Bipolar Schottky TTL while

maintaining CMOS low power dissipation.

be set High to place the output into the high impedance state.

the output has a full 5 V CMOS level output swing. The input protection

circuitry on this device allows overvoltage tolerance on the input,

allowing the device to be used as a logic−level translator from 3 V

CMOS logic to 5 V CMOS Logic or from 1.8 V CMOS logic to 3 V

CMOS Logic while operating at the high−voltage power supply.

voltages up to 7 V are applied, regardless of the supply voltage. This

allows the MC74VHC1GT125 to be used to interface 5 V circuits to

3 V circuits. The output structures also provide protection when

destruction caused by supply voltage − input/output voltage mismatch,

battery backup, hot insertion, etc.

Features

•

February, 2007 − Rev. 12

The MC74VHC1GT125 is a single gate noninverting buffer

The MC74VHC1GT125 requires the 3−state control input (OE) to

The device input is compatible with TTL−type input thresholds and

The MC74VHC1GT125 input structure provides protection when

CMOS−Compatible Outputs: V

High Speed: t

Low Power Dissipation: I

TTL−Compatible Inputs: V

Power Down Protection Provided on Inputs and Outputs

Balanced Propagation Delays

Pin and Function Compatible with Other Standard Logic Families

Chip Complexity: FETs = 62; Equivalent Gates = 16

Pb−Free Packages are Available

= 0 V. These input and output structures help prevent device

IN A

= 3.5 ns (Typ) at V

Figure 1. Pinout (Top View)

GND

IN A

Figure 2. Logic Symbol

= 1 mA (Max) at T

= 0.8 V; V

> 0.8 V

= 5 V

OUT Y

; V

= 2 V

OUT Y

< 0.1 V

= 25°C

@Load

See detailed ordering and shipping information in the package

dimensions section on page 4 of this data sheet.

SC−88A/SOT−353/SC−70

*Date Code orientation and/or position may vary

TSOP−5/SOT−23/SC−59

depending upon manufacturing location.

A Input

(Note: Microdot may be in either location)

CASE 419A

DF SUFFIX

DT SUFFIX

CASE 483

ORDERING INFORMATION

http://onsemi.com

FUNCTION TABLE

PIN ASSIGNMENT

= Device Code

= Date Code*

= Pb−Free Package

OE Input

Publication Order Number:

OUT Y

GND

MC74VHC1GT125/D

IN A

DIAGRAMS

MARKING

Y Output

W1 M G

Related parts for M74VHC1GT125DT1G

M74VHC1GT125DT1G Summary of contents

Page 1

MC74VHC1GT125 Noninverting Buffer / CMOS Logic Level Shifter with LSTTL−Compatible Inputs The MC74VHC1GT125 is a single gate noninverting buffer fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low ...

Page 2

MAXIMUM RATINGS Symbol V DC Supply Voltage Input Voltage Output Voltage OUT I Input Diode Current IK I Output Diode Current Output Current, per Pin OUT I DC Supply Current, V ...

Page 3

DC ELECTRICAL CHARACTERISTICS Î Î Î Î ...

Page 4

... Figure 6. Test Circuit ORDERING INFORMATION Device MC74VHC1GT125DF1 M74VHC1GT125DF1G MC74VHC1GT125DF2 M74VHC1GT125DF2G MC74VHC1GT125DT1 M74VHC1GT125DT1G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. MC74VHC1GT125 SWITCHING WAVEFORMS GND ...

Page 5

... C H SOLDERING FOOTPRINT* 0.50 0.0197 0.40 0.0157 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. MC74VHC1GT125 SC−88A, SOT−353, SC−70 CASE 419A−02 ISSUE J NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. ...

Page 6

... H T *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “ ...

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