TMPM382FSFG Toshiba, TMPM382FSFG Datasheet - Page 102

• Manufacturer Part Number: TMPM382FSFG
• Manufacturer: Toshiba

Specifications of TMPM382FSFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 64K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 64
• Package: QFP(14x14)
• Vcc: 5V
• Cpu Mhz: 40
• Ssp (ch) Spi: 1
• I2c/sio (ch): 1
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 10
• 16-bit Timer / Counter: 6
• Motor / Igbt Control: Y
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

<bit28:7>
<bit29>
7.6.2.18
<TBLOFF>
<TBLBASE> The vector table is in:
bit Symbol
Read/Write
After reset
Function
bit Symbol
Read/Write
After reset
Function
bit Symbol
Read/Write
After reset
Function
bit Symbol
Read/Write
After reset
Function
Vector Table Offset Register
Offset value
TBLOFF
0 = Code space
1 = SRAM space
Set the offset value from the top of the space specified in TBLBASE.
The offset must be aligned based on the number of exceptions in the table. This
means that the minimum alignment is 32 words that you can use for up to 16
interrupts. For more interrupts, it is necessary to adjust the alignment by rounding
up to the next power of two.
R/W
15
23
31
7
0
“0” is read.
R
0
14
22
30
6
TMPM380/M382 - 47 / 59 -
Table base
TBLBA
R/W
SE
29
13
21
5
0
28
12
20
4
Offset value
Offset value
TBLOFF
TBLOFF
R/W
R/W
0
0
“0” is read.
19
27
11
3
R
0
Offset value
TBLOFF
R/W
10
18
26
2
0
17
25
9
1
TMPM380/M382
16
24
0
8