TMPM382FSFG Toshiba, TMPM382FSFG Datasheet - Page 139

• Manufacturer Part Number: TMPM382FSFG
• Manufacturer: Toshiba

Specifications of TMPM382FSFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 64K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 64
• Package: QFP(14x14)
• Vcc: 5V
• Cpu Mhz: 40
• Ssp (ch) Spi: 1
• I2c/sio (ch): 1
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 10
• 16-bit Timer / Counter: 6
• Motor / Igbt Control: Y
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

PLFR1
(0x4000_02C8)
PLDATA
(0x4000_02C0)
PLCR
(0x4000_02C4)
8.2.12 Port L(PL0, PL2)
For this port, inputs can be specified in units of bits. Besides the general-purpose input function, the port
L performs the functions as the external interrupt input and the operation mode setting.
signal, if PL0 is “1”, the device enters single mode and boots from the on-chip flash memory. If PL0 is “0”,
the device enters single boot mode and boots from the internal boot program. For details of single boot
mode, refer to “Flash Memory Operation”.
initializes the port L2 as general-purpose input/output port with input disabled.
and enable input in the PLIE register. These settings enable the interrupt input even if the
CGSTBYCR<DRVE> bit in the clock/mode control block is set to stop driving of pins during STOP
mode.
(Note)
The port L is a general-purpose 2-bit port that contained 1-bit output port and 1-bit input/output port.
While a reset signal is in “0”state, the PL0 input and pull-up are enabled. At the rising edge of the reset
Reset initializes the port L0 as general-purpose output with output disabled , pull-up enabled. Reset
To use the external interrupt input for releasing STOP mode, select this function in the PLFR1 register
Bit Symbol
Read/Write
After reset
Function
Bit Symbol
Read/Write
After reset
Bit Symbol
Read/Write
After reset
Function
In modes other than STOP mode, interrupt input is enabled regardless of the PxFR
register setting as long as input is enabled in PxIE. Make sure to disable unused
interrupts when programming the device.
－
－
－
7
7
7
TMPM380/M382 - 25 / 52 -
－
－
－
6
6
6
Port L function register 1
Port L control register
Port L register
“0” is read.
“0” is read
“0” is read
－
－
－
R
R
R
5
5
5
0
0
－
－
－
4
4
4
－
－
－
3
3
3
1: enabled
0: disabled
1: INTF
0:PORT
Output
PL2F1
PL2C
R/W
R/W
R/W
PL2
0
0
0
2
2
2
“0” is read
“0” is read
TMPM380/M382
R
－
R
－
－
1
1
1
0
“0” is read
R
0
1: enabled
0: disabled
Output
PL0C
R/W
R/W
PL0
0
－
0
0
0
0