TMPM382FSFG Toshiba, TMPM382FSFG Datasheet - Page 268

• Manufacturer Part Number: TMPM382FSFG
• Manufacturer: Toshiba

Specifications of TMPM382FSFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 64K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 64
• Package: QFP(14x14)
• Vcc: 5V
• Cpu Mhz: 40
• Ssp (ch) Spi: 1
• I2c/sio (ch): 1
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 10
• 16-bit Timer / Counter: 6
• Motor / Igbt Control: Y
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

10 16-bit Multi-purpose Timers (MPTs)
•
PMD Control Register ( MTPDn MDCR)
<PWMMD>: PWM carrier waveform
<INTPRD>: PWM interrupt period
<PINT>: PWM interrupt timing
<DTYMD>: Duty mode
<SYNTMD>: Port output mode
<PWMCK>: PWM period extension mode
Read/Write
Read/Write
Read/Write
Read/Write
Bit Symbol
Bit Symbol
Bit Symbol
Bit Symbol
After reset
After reset
After reset
After reset
0: PWM mode 0 (edge-aligned PWM, sawtooth wave)
1: PWM mode 1(center-aligned PWM, triangular wave)
center-aligned PWM.
00: Interrupt request at every 0.5 PWM period (PWM mode 1 only)
01: Interrupt request at every PWM period
10: Interrupt request at every 2 PWM periods
11: Interrupt request at every 4 PWM periods
periods and four PWM periods.
MTPDnvCMPW) and period register (MTPDnMDPRD) are updated into their respective buffers when
the internal counter equals 1 or the MTPDnMDPRD value.
0: Interrupt request when PWM counter = 1
1: Interrupt request when PWM counter = MTPDnMDPRD
or maximum value. When the edge-aligned PWM mode is selected, an interrupt request is generated
when the PWM counter equals the MTPDnMDPRD value. When the PWM interrupt period is set to
every 0.5 PWM period, an interrupt request is generated when the PWM counter equals 1 or
MTPDnMDPRD.)
0: 3-phase common mode
1: 3-phase independent mode
register for all three phases.
0: Normal period
1: 4x periods
This bit selects the PWM mode. PWM mode 0 is edge-aligned PWM and PWM mode 1 is
This field selects the PWM interrupt period from 0.5 PWM period, one PWM period, two PWM
This bit selects whether to make duty setting independently for each phase or to use the CMPU
This bit specifies the port output setting of the U, V and W phases. (See Table 10-8)
When <INTPRD>=00, the contents of the compare registers (MTPDnCMPU, MTPDnCMPV,
This bit selects whether to generate an interrupt request when the PWM counter equals its minimum
When <PWMCK>=0, the PWM counter operates with a resolution of 25 ns at fsys=40 MHz.
When <PWMCK>=1, the PWM counter operates with a resolution of 100 ns at fsys=40 MHz.
R→0
R→0
R→0
R→0
0x4005 0408, 0x4005 0488
* Sawtooth wave: 25ns, triangular wave: 50 ns
31
23
15
0
0
0
7
0
-
-
-
-
PWMCK
R→0
R→0
R→0
30
22
14
0
0
0
6
0
-
-
-
SYNTMD
TMPM380/M382 - 68 / 87 -
R→0
R→0
R→0
29
21
13
0
0
0
5
0
-
-
-
DTYMD
R→0
R→0
R→0
28
20
12
0
0
0
4
0
-
-
-
R→0
R→0
R→0
PINT
R/W
27
19
11
0
0
0
0
3
-
-
-
R→0
R→0
R→0
26
18
10
0
0
0
0
2
-
-
-
INTPRD
R→0
R→0
R→0
25
17
0
0
9
0
0
1
-
-
-
TMPM380/M382
PWMMD
R→0
R→0
R→0
24
16
0
0
8
0
0
0
-
-
-