TMPM382FSFG Toshiba, TMPM382FSFG Datasheet - Page 333

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TMPM382FSFG

Manufacturer Part Number
TMPM382FSFG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMPM382FSFG

Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
64K
Rom Type
Flash
Ram (kbytes)
8K
Number Of Pins
64
Package
QFP(14x14)
Vcc
5V
Cpu Mhz
40
Ssp (ch) Spi
1
I2c/sio (ch)
1
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
N
Cs/wait Controller (ch)
-
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
-
12-bit Ad Converter
10
16-bit Timer / Counter
6
Motor / Igbt Control
Y
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
Y
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
-
Comparators
-
Low-voltage Detector
Y
Etm Hardware Trace
2-bit
<ZDET>: Z Detected
<SFTCAP>: Software Capture
<ENCLR>: Encoder Counter Clear
<ZESEL>: Z Trigger Edge Select
<CMPEN>: Compare Enable
<ZEN>: Z Phase Enable
<ZDET> is set to 1 on the first edge of Z input signal (ENCZ) after <ENRUN> is written from 0 to 1. This
occurs on a rising edge of the signal Z during CW rotation or on a falling edge of Z during CCW rotation.
<ZDET> remains cleared while <ENRUN> = 0.
If <SFTCAP> is set to 1, the value of the encoder counter is captured into the EN0CNT register.
Writing a 1 to <ENCLR> clears the encoder counter to 0. Once cleared, the encoder counter restarts
counting from 0. Writing a 0 to <ENCLR> has no effect. Reading <ENCLR> always returns a 0.
<ZESEL> selects the edge of the ENCZ that should be used as an external trigger in Timer mode.
If <CMPEN> is set to 1, the value of the encoder counter is compared to the value programmed in the
EN0INT register. If <CMPEN> is cleared to 0, this comparison is not done.
0: Not detected
1: Detected
<ZEN> has no influence on the value of <ZDET>.
<ZDET> remains cleared in Sensor Event Count and Sensor Timer Count modes.
0: -
1: Software capture
Writing a 0 to <SFTCAP> has no effect. Reading <SFTCAP> always returns a 0.
In Encoder and Sensor Event Count modes, <SFTCAP> has no effect; a write of a 1 to this bit is
ignored.
0: -
1: Clears the encoder counter.
0: Uses a rising edge of the ENCZ as an external trigger input.
1: Uses a falling edge of the ENCZ as an external trigger input.
In the other operating modes, <ZESEL> has no effect.
0: Compare disabled
1: Compare enabled
0: Disabled
1: Enabled
motor is rotating in the CW direction; the encoder counter is cleared on the falling edge of ENCZ if
the motor is rotating in the CCW direction. If the edges of ENCLK (multiply_by_4 clock derived from
the decoded A and B signals) and the edge of ENCZ coincide, the encoder counter is cleared to 0
without incrementing or decrementing (i.e., the clear takes precedence).
In Encoder mode
<ZEN> controls whether to clear the encoder counter (EN0CNT) on the rising or falling edge of Z.
When <ZEN> = 1, the encoder counter is cleared on the rising edge of the ENCZ input if the
TMPM380/M382 - 7 / 23 -
TMPM380/M382

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