TMPM382FSFG Toshiba, TMPM382FSFG Datasheet - Page 362
TMPM382FSFG
Manufacturer Part Number
TMPM382FSFG
Description
Manufacturer
Toshiba
Datasheet
1.TMPM380FWDFG.pdf
(700 pages)
Specifications of TMPM382FSFG
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
64K
Rom Type
Flash
Ram (kbytes)
8K
Number Of Pins
64
Package
QFP(14x14)
Vcc
5V
Cpu Mhz
40
Ssp (ch) Spi
1
I2c/sio (ch)
1
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
N
Cs/wait Controller (ch)
-
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
-
12-bit Ad Converter
10
16-bit Timer / Counter
6
Motor / Igbt Control
Y
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
Y
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
-
Comparators
-
Low-voltage Detector
Y
Etm Hardware Trace
2-bit
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TMPM380/M382
13.3.7 Receive FIFO Buffer
In addition to the double buffer function already described, data may be stored using the
receive FIFO buffer. By setting <CNFG> of the SC0FCNF register and <FDPX1:0> of the
SC0MOD1 register, the 4-byte receive buffer can be enabled. Also, in the UART mode or
I/O interface mode, data may be stored up to a predefined fill level. When the receive FIFO
buffer is to be used, be sure to enable the double buffer function.
If data with parity bit is to be received in the UART mode, parity check must be performed
each time a data frame is received.
TMPM380/M382 - 13 / 52 -
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