TMPM382FSFG Toshiba, TMPM382FSFG Datasheet - Page 384

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TMPM382FSFG

Manufacturer Part Number
TMPM382FSFG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMPM382FSFG

Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
64K
Rom Type
Flash
Ram (kbytes)
8K
Number Of Pins
64
Package
QFP(14x14)
Vcc
5V
Cpu Mhz
40
Ssp (ch) Spi
1
I2c/sio (ch)
1
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
N
Cs/wait Controller (ch)
-
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
-
12-bit Ad Converter
10
16-bit Timer / Counter
6
Motor / Igbt Control
Y
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
Y
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
-
Comparators
-
Low-voltage Detector
Y
Etm Hardware Trace
2-bit
SC0FCNF
13.4.8 FIFO configuration register
<RFST>:
<TFIE>:
<RFIE>:
<RXTXCNT>:
<CNFG>:
(Note 1)
(Note 2)
bit Symbol
Read/Write
After reset
Function
Regarding TX FIFO, the maximum number of bytes being configured is always
The FIFO can not use in 9bit UART mode.
available. The available number of bytes is the bytes already written to the TX FIFO.
When RX FIFO is enabled, the number of RX FIFO bytes to be used is selected
Note 1)
0: The maximum number of bytes of the FIFO configured (see also <CNFG>).
1: Same as the fill level for receive interrupt generation specified by SC0RFC <RIL1:0>.
When TX FIFO is enabled, transmit interrupts are enabled or disabled by this parameter.
When RX FIFO is enabled, receive interrupts are enabled or disabled by this parameter.
Enables FIFO.
If enabled, the SCOMOD1 <FDPX1:0> setting automatically configures FIFO as follows:
(The type of TX/RX can be specified in the mode control register 1
SC0MOD1<FDPX1:0>).
Half duplex
RX
Half duplex
TX
Full duplex
Be sure to write “000”.
Controls automatic disabling of transmission and reception.
The mode control register SC0MOD1 <FDPX1:0> is used to set the types of TX/RX.
Setting “1” enables to operate as follows.
Reserved
Half duplex
RX
Half duplex
TX
Full duplex
7
0
.
Reserved
RX FIFO 4byte
TX FIFO 4byte
RX FIFO 2byte+TX FIFO 2byte
6
0
When receive shift register, the receive buffer and the RX FIFO are
filled,SC0MOD0<RXE> is automatically set to "0" to inhibit further
reception.
When the TX FIFO, the transmit buffer and the transmit shift register
is empty,SC0MOD1<TXE> is automatically set to "0" to inhibit further
transmission.
When either of the above two conditions is satisfied, TXE/RXE are
automatically set to “0” to inhibit further transmission and
reception.
TMPM380/M382 - 35 / 52 -
Reserved
5
0
Bytes used
0: Maximum
1:Same as
FILL level of
RX FIFO
in RX FIFO
RFST
4
0
R/W
TX interrupt
for TX FIFO
0: Disabled
1: Enabled
TFIE
3
0
RX interrupt
for RX FIFO
0:Disabled
1: Enabled
RFIE
2
0
Automatic
disable of
RXE/TXE
0:None
1:Auto
RXTXCNT
TMPM380/M382
disabl
e
1
0
FIFO
enable
0: Disabled
1: Enabled
CNFG
0
0
(see

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