TMPM382FSFG Toshiba, TMPM382FSFG Datasheet - Page 385

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TMPM382FSFG

Manufacturer Part Number
TMPM382FSFG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMPM382FSFG

Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
64K
Rom Type
Flash
Ram (kbytes)
8K
Number Of Pins
64
Package
QFP(14x14)
Vcc
5V
Cpu Mhz
40
Ssp (ch) Spi
1
I2c/sio (ch)
1
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
N
Cs/wait Controller (ch)
-
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
-
12-bit Ad Converter
10
16-bit Timer / Counter
6
Motor / Igbt Control
Y
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
Y
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
-
Comparators
-
Low-voltage Detector
Y
Etm Hardware Trace
2-bit
13 Serial channel (UART/SIO)
SC0RFC
13.4.9 RX FIFO configuration register
<RFCS>:
<RFIS>:
<RIL1:0>:
(Note)
bit Symbol
Read/Write
After reset
Function
To use TX/RX FIFO buffer, TX/RX FIFO must be cleared after setting the SIO transfer
mode (half duplex/full duplex) and enabling FIFO (SC0FCNF<CNFG> = "1").
Clears RX FIFO
Setting “1” clears RX FIFO and “0” is always read.
Specifies the condition of interrupt generation.
0: An interrupt is generated when it reaches to the specified fill level.
An interrupt is generated when it is reaches to the specified fill level or if it exceeds the
specified fill level at the time data is read.
Specifies FIFO fill level.
00
01
10
11
RX FIFO
clear
1: Clear
“0” is read.
RFCS
Other than full
duplex
4byte
1byte
2byte
3byte
W
7
0
1: when the
data reaches to
the specified fill
level or the data
exceeds the
specified fill
Select
interrupt
generation
condition
0: when the
data reaches
to the
specified fill
level.
level at the
time data is
read.
RFIS
R/W
6
0
TMPM380/M382 - 36 / 52 -
Full duplex
2byte
1byte
2byte
1byte
“0” is read.
5
4
R
0
3
2
FIFO fill level to generate RX
interrupts
00:4byte
10:2byte
11:3byte
01:1byte
RIL1
1
0
TMPM380/M382
R/W
RIL0
0
0

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