TMPM382FSFG Toshiba, TMPM382FSFG Datasheet - Page 393

• Manufacturer Part Number: TMPM382FSFG
• Manufacturer: Toshiba

Specifications of TMPM382FSFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 64K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 64
• Package: QFP(14x14)
• Vcc: 5V
• Cpu Mhz: 40
• Ssp (ch) Spi: 1
• I2c/sio (ch): 1
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 10
• 16-bit Timer / Counter: 6
• Motor / Igbt Control: Y
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

13 Serial channel (UART/SIO)
INTRX0 Interrupt request)
INTRX0 Interrupt request)
Receive data
read timing
SCLK0 input
(<SCLKS>=0
Rising edge mode)
SCLK0 input
(<SCLKS>=1
Falling edge mode)
Receive data
read timing
SCLK0 input
(<SCLKS>=0
Rising edge mode)
SCLK0 input
(<SCLKS>=1
Falling edge mode)
RBFULL
RBFULL
OERR
RXD0
RXD0
(Note) To receive data, SC0MOD <RXE> must always be set to “1” (receive enable) in the
Fig 13-13 Receive Operation in the I/O Interface Mode (SCLK0 Input Mode)
SCLK output / SCLK input mode.
SCLK input mode
The INTRX0 receive interrupt is generated each time received data is moved to received
buffer.
In the SCLK input mode, receiving double buffering is always enabled, the received frame
can be moved to receive buffer and receive shift register can receive the next frame
successively.
bit 0
bit 0
If data cannot be read from buffer
If data is read from buffer
TMPM380/M382 - 44 / 52 -
bit 1
bit 1
bit 5
bit 5
bit 6
bit 6
bit 7
bit 7
TMPM380/M382
bit 0
bit 0