TMPM382FSFG Toshiba, TMPM382FSFG Datasheet - Page 490

• Manufacturer Part Number: TMPM382FSFG
• Manufacturer: Toshiba

Specifications of TMPM382FSFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 64K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 64
• Package: QFP(14x14)
• Vcc: 5V
• Cpu Mhz: 40
• Ssp (ch) Spi: 1
• I2c/sio (ch): 1
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 10
• 16-bit Timer / Counter: 6
• Motor / Igbt Control: Y
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

16 Remote control signal preprocessor (RMC)
16.3.1.6
interrupt is generated, the RMCRSTAT <RMCDMAXIF> bit is set to “1”.
generated, the RMCRSTAT <RMCLOIF> bit is set to “1”.
1) Completed by a maximum data bit cycle
Detecting a maximum data bit cycle completes reception and generates an interrupt. After the
2) Completed by excess low width
Detecting excess low width completes reception and generates an interrupt. After the interrupt is
Reception Completion
TMPM380/M382 - 20 / 25 -
Threshold: < RMCLL7:0>
Excess low width is detected when signal stay
low longer than specified.
Threshold: <RMCDMAX7:0>
If the falling edge of the data bit cycle isn’t monitored after time
specified as threshold, a maximum data bit cycle is detected.
The detection completes reception and generates an interrupt.
Excess low width detection
interrupt
Maximum
interrupt
TMPM380/M382
data
bit
cycle