TMPM382FSFG Toshiba, TMPM382FSFG Datasheet - Page 51

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TMPM382FSFG

Manufacturer Part Number
TMPM382FSFG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMPM382FSFG

Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
64K
Rom Type
Flash
Ram (kbytes)
8K
Number Of Pins
64
Package
QFP(14x14)
Vcc
5V
Cpu Mhz
40
Ssp (ch) Spi
1
I2c/sio (ch)
1
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
N
Cs/wait Controller (ch)
-
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
-
12-bit Ad Converter
10
16-bit Timer / Counter
6
Motor / Igbt Control
Y
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
Y
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
-
Comparators
-
Low-voltage Detector
Y
Etm Hardware Trace
2-bit
6 Clock/Mode Control
6.5.9
● Release by interrupt request
● Release by NMI
release source that can be used is determined by the low power consumption mode selected.
Details are shown in Table 6-8.
detect the interrupt. In addition to the setting in the CPU, the clock generator must be set to detect
the interrupt to be used to release the SLEEP and STOP modes.
INTWDT can be used in IDLE mode only.
Release
(Note 1)
(Note 2)
source
The low power consumption mode can be released by an interrupt request, NMI or reset. The
To release the low power consumption mode by an interrupt, the CPU must be set in advance to
There are two kinds of NMI sources: WDT interrupt (INTWDT) and VLTD interrupt (INTVLTD).
Releasing the Low Power Consumption Mode
○:
×:
Low power consumption mode
NMI (INTWDT)
NMI (INTVLTD)
RESET (RESET pin and POR)
Interrupt
Starts the interrupt handling after the mode is released. (The reset
initializes the LSI).
Unavailable
For switching to the low power consumption mode, set the CPU to prohibit all the
interrupts other than the release source. If not, releasing may be executed by an
unspecified interrupt.
To release the low power consumption mode by using the level mode interrupt,
keep the level until the interrupt handling is started. Changing the level before
then will prevent the interrupt handling from starting properly.
INT0~F (Note 1)
INTRTC
INTRMCRX
INTSSP0,1
INTSBI0,1
INTRX0 to 4,/ INTTX0 to 4
INTADPD0,1/ INTADCP0,1
INTADTMR/ INTADSFT
INTPMD0,1/ INTEMG0,1
INTMTTB00 to 20
INTMTTB01 to 21
INTMTCAP00 to 20, 01,to 21
INTMTEMG0,1,2
INTTB00 to 70,01 to 71
INTCAP00 to 70, 01 to 71
INTENC0,1
INTDMACERR/ INTDMACTC
Table 6-8 Release Source in Each Mode
TMPM380/M382 - 20 / 24 -
IDLE
×
SLEEP
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
STOP
TMPM380/M382
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×
×

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