TMPM382FSFG Toshiba, TMPM382FSFG Datasheet - Page 511

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TMPM382FSFG

Manufacturer Part Number
TMPM382FSFG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMPM382FSFG

Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
64K
Rom Type
Flash
Ram (kbytes)
8K
Number Of Pins
64
Package
QFP(14x14)
Vcc
5V
Cpu Mhz
40
Ssp (ch) Spi
1
I2c/sio (ch)
1
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
N
Cs/wait Controller (ch)
-
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
-
12-bit Ad Converter
10
16-bit Timer / Counter
6
Motor / Igbt Control
Y
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
Y
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
-
Comparators
-
Low-voltage Detector
Y
Etm Hardware Trace
2-bit
18 Real Time Clock (RTC)
RTCPAGER
A
read-modify-
write
operation
cannot be
performed.
(Note) Keep the setting order of <ENATMR>, <ENAAML> and <INTENA> as shown in
Bit symbol
Read/Write
After reset
Function
(10) PAGE register (for PAGE0/1)
the example below. Ensure an interval of time between Clock/Alarm and
interrupt.
Example: Clock setting/Alarm setting
RTCPAGER ← 0 0 0 0 1 1 0 0
RTCPAGER ← 1 0 0 0 1 1 0 0
0: Disabled
1: Enabled
INTRTC
INTENA
R/W
7
0
7 6 5 4 3 2 1 0
6
TMPM380/M382 - 10 / 16 -
“0” is read.
R
0
5
ADJUST
PAGE
[Write]
0: Don’t care
1:Sets
[Read]
0:No
1:ADJUST
ADJUST
ADJUST
request
ADJUST
requested
requested
R/W
4
0
Enables Clock and alarm
Enables interrupt by setting bit 7 to “1”.
Clock
0: Disabled
1: Enabled
0
1
0
1
ENATMR
3
Undefined
Selects Page0
Selects Page1
Don’t care
Adjusts seconds. The request is sampled when
the sec. counter counts up.
If the time elapsed is between 0 and 29
seconds, the sec. counter is cleared to “0”. If
the time elapsed is between 30 and 59
seconds, the min. counter is carried and sec.
counter is cleared to "0".
shows if ADJUST is requested or not.
R/W
ALARM
0: Disabled
1: Enabled
ENAALM
2
“0” is read.
1
R
0
TMPM380/M382
Reading this bit
PAGE
selection
PAGE
R/W
0
0

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