TMPM382FSFG Toshiba, TMPM382FSFG Datasheet - Page 524

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TMPM382FSFG

Manufacturer Part Number
TMPM382FSFG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMPM382FSFG

Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
64K
Rom Type
Flash
Ram (kbytes)
8K
Number Of Pins
64
Package
QFP(14x14)
Vcc
5V
Cpu Mhz
40
Ssp (ch) Spi
1
I2c/sio (ch)
1
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
N
Cs/wait Controller (ch)
-
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
-
12-bit Ad Converter
10
16-bit Timer / Counter
6
Motor / Igbt Control
Y
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
Y
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
-
Comparators
-
Low-voltage Detector
Y
Etm Hardware Trace
2-bit
OFDRST:
Note1) Writing to OFDRST is protected by setting "0x06" to OFDCR1 but reading from OFDRST is always
Read/Write
Read/Write
Read/Write
Read/Write
Bit symbol
After reset
Bit symbol
After reset
Bit symbol
After reset
Bit symbol
After reset
19.3.1.5
Function
Function
Function
Function
enabled without setting of OFDCR1.
0x4004_0818
Oscillation frequency detector reset enable control register (OFDRST)
15
23
31
R
R
R
R
7
0
0
0
0
-
-
-
-
14
22
30
6
R
R
R
R
0
0
0
0
-
-
-
-
TMPM380/382 - 7 / 12 -
13
21
29
R
R
R
R
5
0
0
0
0
-
-
-
-
Always read “0”
Always read “0”
Always read “0”
Always read “0”
12
20
28
R
R
R
R
4
0
0
0
0
-
-
-
-
11
19
27
R
R
R
R
3
0
0
0
0
-
-
-
-
10
18
26
R
R
R
R
2
0
0
0
0
-
-
-
-
17
25
R
R
R
R
1
9
0
0
0
0
-
-
-
-
TMPM380/382
OFDRSTEN
1: Enable
0: Disable
R/W
16
24
0
8
R
R
R
1
0
0
0
-
-
-

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