TMPM382FSFG Toshiba, TMPM382FSFG Datasheet - Page 581

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TMPM382FSFG

Manufacturer Part Number
TMPM382FSFG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMPM382FSFG

Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
64K
Rom Type
Flash
Ram (kbytes)
8K
Number Of Pins
64
Package
QFP(14x14)
Vcc
5V
Cpu Mhz
40
Ssp (ch) Spi
1
I2c/sio (ch)
1
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
N
Cs/wait Controller (ch)
-
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
-
12-bit Ad Converter
10
16-bit Timer / Counter
6
Motor / Igbt Control
Y
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
Y
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
-
Comparators
-
Low-voltage Detector
Y
Etm Hardware Trace
2-bit
23 Flash Memory Operation
(4) Data Transfer Format
(5) Restrictions on internal memories
Single Boot Mode places restrictions on the internal RAM and ROM as shown in
Internal ROM
Internal RAM
Table 23-4, Table 23-6 and Table 23-7 illustrate the operation commands and data transfer formats at
each operation mode. In conjunction with this section, refer to (6) Operation of Boot Program.
Memory
Note : Code 0x20 and 0x30 are use for internal test
The following addresses are assigned for storing software ID information and passwords.
Storing program in these addresses is not recommendable.
BOOT ROM is mapped from 0x2000_0000 to 0x2000_03FF.
Store the RAM transfer program from 0x2000_0400 through the end address of RAM.
TMPM380FY
TMPM380/382FW
TMPM382FS
Table 23-5 Restrictions in Single Boot Mode
Table 23-4 Single Boot Mode Commands
0x10
0x20
0x30
0x40
Code
TMPM380/M382 - 20 / 54 -
:0x3F83_FFF0 to 0x3F83_FFFF
:0x3F83_FFF0 to 0x3F83_FFFF
:0x3F83_FFF0 to 0x3F83_FFFF
RAM transfer
Don’t care
Don’t care
Chip and protection bit erase
Details
Command
Table 23-5
.
TMPM380/M382

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