TMPM382FSFG Toshiba, TMPM382FSFG Datasheet - Page 620

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TMPM382FSFG

Manufacturer Part Number
TMPM382FSFG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMPM382FSFG

Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
64K
Rom Type
Flash
Ram (kbytes)
8K
Number Of Pins
64
Package
QFP(14x14)
Vcc
5V
Cpu Mhz
40
Ssp (ch) Spi
1
I2c/sio (ch)
1
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
N
Cs/wait Controller (ch)
-
Dma Controller
2
10-bit Da Converter
-
10-bit Ad Converter
-
12-bit Ad Converter
10
16-bit Timer / Counter
6
Motor / Igbt Control
Y
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
Y
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
Y
Hardware Cec Controller
-
Comparators
-
Low-voltage Detector
Y
Etm Hardware Trace
2-bit
24.4 Writing and erasing
24.4.1 Protection bits
24.4.2 Security bit
1) Write the code 0xa74a9d23 to FCSECBIT register.
2) Write data within 16 clocks from the writing above.
Note) The above procedure is enabled only when using 32-bit data transfer command.
Writing and erasing protection bits are available with a single chip mode, single boot mode and
writer mode.
Writing to the protection bits is done on block-by-block basis.
Erasing of the protection bits is done by two groups of the blocks: block 0 through 3 and block 4
through 5. When the settings for all the blocks are “1”, erasing must be done after clearing the
FCSECBIT <SECBIT> bit to “0”. An attempt to erase protection bits when <SECBIT> bit is “1”, it will
erases all the contents of flash memory include protection bits. To write and erase the protection bits,
command sequence is used.
See chapter 23 Flash Memory Operation for details.
The FCSECBIT <SECBIT> bit that activates security function is set to “1” at a power-on reset right
after power-on. It can be rewritten at single chip mode and single boot mode.by the following
procedure.
TMPM380/M382 - 5 / 5 -
TMPM380/M382

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