TMPM382FSFG Toshiba, TMPM382FSFG Datasheet - Page 71

• Manufacturer Part Number: TMPM382FSFG
• Manufacturer: Toshiba

Specifications of TMPM382FSFG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 64K
• Rom Type: Flash
• Ram (kbytes): 8K
• Number Of Pins: 64
• Package: QFP(14x14)
• Vcc: 5V
• Cpu Mhz: 40
• Ssp (ch) Spi: 1
• I2c/sio (ch): 1
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: N
• Cs/wait Controller (ch): -
• Dma Controller: 2
• 10-bit Da Converter: -
• 10-bit Ad Converter: -
• 12-bit Ad Converter: 10
• 16-bit Timer / Counter: 6
• Motor / Igbt Control: Y
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: Y
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: Y
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: Y
• Etm Hardware Trace: 2-bit

standby mode
Not clearing
7 Exceptions
Settings for generating
interrupt request signal
(factor to clear standby
Settings for detection
CG detects interrupt
Hardware Interrupt
factor is generated
7.5.2
Processing
7.5.2.1 Flowchart
The following shows how an interrupt is handled.
mode)
Interrupt handling
indicates hardware handling.
Clearing standby
mode
Set the CPU register to detect an interrupt.
Set the clock generator as well if the interrupt clear the
standby mode.
○ Common setting
○ Setting to clear standby mode
Execute an appropriate setting to generate the interrupt
signal depending on the interrupt type.
○Interrupt from the external pin
○Interrupt from peripheral IP
The hardware interrupt factor is generated.
The interrupt, which is used for clearing the standby modes,
is connected to the CPU via the clock generator.
CPU register
Clock generator
Port
Peripheral IP (See chapters of relevant IP for details.)
TMPM380/M382 - 16 / 59 -
indicates software handling.
Details
TMPM380/M382
Preparation
Detection by
7.5.2.2
7.5.2.3
See
CG