TMP92xy22FG Toshiba, TMP92xy22FG Datasheet - Page 143
TMP92xy22FG
Manufacturer Part Number
TMP92xy22FG
Description
Manufacturer
Toshiba
Datasheet
1.TMP92XY22FG.pdf
(260 pages)
Specifications of TMP92xy22FG
Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
32
Architecture
32-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
-
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
-
Number Of I/o Ports
50
Power Supply Voltage(v)
3.0 to 3.6
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3.9
Serial Channels (SIO)
both channels either UART Mode (Asynchronous transmission) or I/O interface mode
(Synchronous transmission) can be selected.
master controller start slave controllers via a serial link (Multi-controller system).
structured in prescaler, serial clock generation circuit, receiving buffer and control circuit, and
transfer buffer and control circuit.
operation of channel 0 is explained below.
•
•
The TMP92CM22 includes 2 serial I/O channels. Each channel is called SIO0 and SIO1. For
In mode 1 and mode 2 a parity bit can be added. Mode 3 has a wakeup function for making the
Serial channels 0 and 1 can be used independently.
Both channels operate in the same function except for the following points; hence only the
This chapter contains the following sections:
Figure 3.9.2 and Figure 3.9.3 are block diagrams for each channel. Each channel is
I/O interface mode
UART mode
3.9.1 Block Diagram
3.9.2 Operation of Each Circuit
3.9.3 SFRs
3.9.4 Operation in Each Mode
3.9.5 Support for IrDA Mode
Pin name
IrDA mode
Table 3.9.1 Differences between Channels 0 to 1
TXD0 (PF0)
RXD0 (PF1)
CTS0
Channel 0
92CM22-141
/SCLK0 (PF2)
Mode 0: For transmitting and receiving I/O data using the
Mode 1: 7-bit data
Mode 2: 8-bit data
Mode 3: 9-bit data
Yes
synchronizing signal SCLK for extending I/O.
TXD1 (PF3)
RXD1 (PF4)
CTS1
Channel 1
/SCLK1 (PF5)
No
TMP92CM22
2007-02-16
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