TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 122

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

P5DR
(0085H)
P5FC
(0017H)
P5
(0014H)
bit Symbol
Read/Write
System
Reset State
Hot Reset
State
bit Symbol
Read/Write
System
Reset State
(Note2)
Hot Reset
State
Function
bit Symbol
Read/Write
System
Reset State
Hot Reset
State
Function
Note1: A read-modify-write operation cannot be performed for P5FC.
Note2: It is set to “Port” or “Data bus” by AM pins state.
P57F
P57D
P57
0/1
−
7
7
7
1
−
0
−
P56D
P56F
P56
0/1
−
6
6
6
1
−
−
0
Figure 3.7.6 Register for Port5
Input/Output buffer drive register for standby mode
Port 5 Function register
P55F
P55D
P55
0/1
Port 5 Drive register
5
5
−
5
−
1
−
0
92CF26A-120
0:Port
Port 5 register
P54F
P54D
1:Address bus (A8 to A15)
P54
0/1
4
4
−
4
−
1
0
−
R/W
R/W
W
P53F
P53D
P53
0/1
3
3
−
3
−
1
0
−
P52F
P52D
P52
0/1
2
2
0
−
−
2
1
−
P51F
P51D
P51
0/1
−
1
1
0
−
1
−
1
TMP92CF26A
P50D
P50F
P50
0/1
0
0
0
−
−
0
1
−
2009-06-25