TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 176

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

PXDR
(009FH)
PXCR
(00B2H)
PXFC
(00B3H)
PX
(00B0H)
bit Symbol
Read/Write
System
Reset State
Hot Reset
State
bit Symbol
Read/Write
System
Reset State
Hot Reset
State
Function
bit Symbol
Read/Write
System
Reset State
Hot Reset
State
Function
bit Symbol
Read/Write
System
Reset State
Hot Reset
State
Function
PX4 setting
<PX4F>
Note 1: A read-modify-write operation cannot be performed for the registers PXCR, PXFC.
Note 2: When PXFC<PX4F>= “1”, Function is changed by PX<PX4> setting. Refer to following PX4 setting table.
<PX4>
0
1
0: Input
1: Output
0:Port
1:
Reserved
PX7C
PX7F
PXD7
PX7
R/W
R/W
CLKOUT
W
W
7
7
7
7
0
−
0
−
1
−
output
(Output latch register is cleared to “0”)
0
Input/Output buffer drive register
Output port
Data from external port
LDIV output
Figure 3.7.65 Register for Port X
for standby mode
6
6
6
6
1
−
0: Input
1: Output
0:Port
1:X1USB
Port X function register
Port X control register
PX5C
PX5F
PXD5
PX5
Port X drive register
W
5
5
5
0
−
0
−
5
input
1
−
92CF26A-174
Port X register
R/W
R/W
W
Refer to
following
table
PX4
PX4F
PXD4
4
4
4
0
−
4
1
−
Note2)
3
3
3
3
2
2
2
2
1
1
1
1
TMP92CF26A
0
0
0
0
2009-06-25