TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 179

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

PZDR
(009AH)
PZCR
(006AH)
PZ
(0068H)
bit Symbol
Read/Write
System
Reset State
Hot Reset
State
bit Symbol
Read/Write
System
Reset State
Hot Reset
State
Function
bit Symbol
Read/Write
System
Reset State
Hot Reset
State
Function
Note: A read-modify-write operation cannot be performed for the registers PZCR.
PZ7C
PZ7D
PZ7
7
7
7
0
−
1
−
PZ6C
PZ6D
PZ6
Figure 3.7.68 Register for Port Z
6
6
6
0
−
1
−
Data from external port (Output latch register is cleared to “0”)
Input/Output buffer drive register for standby mode
Port Z control register
PZ5C
PZ5D
PZ5
Port Z drive register
1
−
5
5
5
0
−
92CF26A-177
Port Z register
PZ4C
PZ4D
0: Input 1: Output
PZ4
4
4
0
−
4
1
−
R/W
R/W
W
−
PZ3C
PZ3D
PZ3
3
3
0
−
3
1
−
PZ2C
PZ2D
PZ2
2
2
2
0
−
1
−
PZ1C
PZ1D
PZ1
1
1
1
1
−
0
−
TMP92CF26A
PZ0C
PZ0D
PZ0
0
0
0
1
−
0
−
2009-06-25