TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 204

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

(3) Setting up the NAND flash area
Note: In this case, the 32-Kbyte memory area from 000000H to 007FFFH within the SDCS space cannot be used.
cannot be used. This section provides an example of such cases.
CS2 or CS1 (SDCS) space. A detailed description is provided below..
accessed at the same time, which leads to problems such as a data conflict.
007FFFH be assigned to the CS0 space. (The
only NAND flash will be accessed without causing data conflicts.
In case of using SDRAM (SDCS) and NAND flash together, the BROMCR<CSDIS> bit
It is recommended that the memory area from 000000H to 3FFFFFH be assigned to the
In this case, the NAND flash area overlaps with the CS2 or CS1 (SDCS) space.
So, if a program accesses NAND flash, the CS2 or CS1 space and NAND flash space are
To avoid this, it is recommended that the 32-Kbyte memory area from 000000H to
Since the CS0 setting has higher priority over the settings of the CS2 and CS1 spaces,
Figure 3.8.9 Recommended Assignment for the SDCS and CS0 Spaces
001FF0H
021FFFH
04A000H
000000H
002000H
200000H
400000H
046000H
Internal Back UP RAM
Internal RAM
(128 Kbytes)
COMMON X
NAND flash
(16 Kbytes)
Internal I/O
(2 Mbytes)
(2 Mbytes)
(16 bytes)
LOCAL X
92CF26A-202
CS0
pin is not required.)
SDCS: CS2 or CS1 area setting
000000H to 3FFFFFH (4 Mbytes)
CS0 area setting 000000H to
007FFFH (32 Kbytes)
TMP92CF26A
2009-06-25