TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 215

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TMP92xy26AXBG

Manufacturer Part Number
TMP92xy26AXBG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy26AXBG

Package
FPGA228
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144/288
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
136
Power Supply Voltage(v)
3.0 to 3.6
LOCALWZ
(089CH)
(089DH)
Bit Symbol
Read/Write
Reset State
Function
Bit Symbol
Read/Write
Reset State
Function
Bank for
LOCAL-Z
0: Disable
1: Enable
R/W
LZE
15
Z7
7
0
0
(Since bank 3 is overlapping with the COMMON area, this filed must not be specified as 3.)
14
Z6
6
0
LOCAL-Z Register for Write Data
Settings of the Z8 through Z0 bits and their corresponding chip select signals
000000000 to 001111111 CSZA
010000000 to 011111111 CSZB
Specify the bank number for the LOCAL-Z area
13
92CF26A-213
Z5
5
0
Specify the bank number for the LOCAL-Z area
12
Z4
4
0
R/W
11
Z3
3
0
100000000 to 101111111 CSZC
110000000 to 111111111 CSZD
10
Z2
2
0
Z1
1
9
0
TMP92CF26A
2009-06-25
R/W
Z0
Z8
0
8
0
0

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