TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 229

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

SDLUDQM
SDLUDQM
SDLLDQM
SDLLDQM
SDRAS
SDCAS
SDRAS
SDCAS
SDCKE
SDCKE
A15-A0
D15-D0
A15-A0
D15-D0
SDCLK
SDWE
SDCLK
SDWE
SDCS
SDCS
A10
A10
Active
Active
Bank
Bank
RA
RA
RA
RA
2CLK
t
t
1CLK
1CLK
RCD
RCD
D(n)
D (n)
=
=
Write
3CLK
Write
Figure 3.10.4 Single Write Cycle Timing
CA (n)
Figure3.10.5 Burst Write Cycle Timing
CA(n)
1CLK
t
1CLK
WR
=
D(n+2)
1CLK
92CF26A-227
Write
2CLK
CA (n+2)
D(n+4)
D (n+2)
1CLK
t
WR
=
D(n+6)
CA (n+4)
Write
2CLK
D (n+4)
1CLK
t
WR
CA(n)
=
D(end)
Burst Stop Cycle 2CLK
A15-0
A10
Burst
Stop
TMP92CF26A
2009-06-25